Visualising Sharing Behaviour in relation to Shared Memory Management

Accesses to the shared memory remain to be a major performance limitation in shared memory multiprocessors. Scalable multiprocessors with distributed memory also poses the problem of keeping the memory coherent. A large number of shared memory coherence mechanisms has been proposed to solve this problem. Their relative performance is, however, determined by the sharing behaviour of the workloads. This paper presents a methodology to capture and visu-alise the sharing behaviour of a parallel program with respect to the choice coherence mechanisms. We identify four conceptual workload parameters: Spatial granularity, Degree of sharing, Access mode, and the Temporal Granu-larity. To demonstrate the effectiveness of the methodology, we have analysed the sharing behaviour of two parallel applications. The result is used to judge what shared memory coherence mechanism is most appropriate. The shared memory paradigm of programming parallel applications for multiprocessors and other environments has emerged as the preferred paradigm over others, such as the message passing model. Several small-scale, bus-based, shared memory multiprocessors are now commercially available and there are numerous research projects going on with large-scale shared memory multiprocessors, e.g. [1, 15]. In addition, there are also a number of ongoing projects with aim to put a shared memory environment on distributed memory machines or to use a network of workstations as a shared memory multicomputer [16] In order to make shared memory multiprocessors scala-ble, focus has recently been on distributed shared memory where the memory is distributed among the processing nodes. Figure 1 shows a general view of such an architecture. A processor, together with some memory form a processing node. A number of processing nodes are interconnected with an interconnection network. The local memory of a processing node is directly accessible by the processor. The contents in the memory of the other processing nodes is accessible either directly, or through some software mechanism. In both cases, at substantially higher cost than for the local memory. The distribution of memory across the processing nodes makes it very important to exploit the locality of reference of the parallel programs in order to minimise the average access time to shared memory. One approach to automate this has been to use memory coherence mechanisms so that shared variables may be replicated or automatically migrated between the processing nodes. Several memory coherence mechanisms have been proposed in the literature [8, 14, 20]. They encompass both cache coherence maintenance and virtual page level management. …