Design of Xilinx DDR2 IP Controller

This paper presents a DDR2 Controller IP core of FPGA implementation which user-friendly and quickly applied to the product.The IP core allows the user does not need to understand the principles and practices DDR2 circumstances,and can still control the DDR2.This thesis briefly introduces that the characteristics and operating principles of DDR2,and analyze that the function of each module in the DDR2 controller IP core.Emphasized the function of the perfect user interface,described the IP core operational processes in the paper,so that each user can easily use the IP core.