Necessary and sufficient conditions for mismatch shaping in a general class of multibit DACs

Multibit digital-to-analog converters (DACs) are often constructed by combining several 1-bit DACs of equal or different weights in parallel. In such DACs, component mismatches give rise to signal dependent error that can be viewed as additive DAC noise. In some cases these DACs use dynamic element matching techniques to decorrelate the DAC mismatch noise from the input sequence and suppress its power in certain frequency bands. Such DACs are referred to as mismatch-shaping DACs and have been used widely as enabling components in state-of-the-art /spl Delta//spl Sigma/ data converters. Several different mismatch-shaping DAC topologies have been presented, but theoretical analyses have been scarce and no general unifying theory has been presented in the previously published literature. This paper presents such a unifying theory in the form of necessary and sufficient conditions for a multibit DAC to be a mismatch-shaping DAC and applies the conditions to evaluate the DAC noise generated by several of the previously published mismatch-shaping DACs and qualitatively compare their behavior.

[1]  Luis Hernandez.  A model of mismatch-shaping D/A conversion for linearized DAC architectures , 1998 .

[2]  L. Longo,et al.  A 90-dB SNR 2.5-MHz output-rate ADC using cascaded multibit delta-sigma modulation at 8/spl times/ oversampling ratio , 2000, IEEE Journal of Solid-State Circuits.

[3]  R. Baird,et al.  Linearity enhancement of multibit /spl Delta//spl Sigma/ A/D and D/A converters using data weighted averaging , 1995 .

[4]  I. Galton,et al.  An audio ADC Delta-Sigma modulator with 100-dB peak SINAD and 102-dB DR using a second-order mismatch-shaping DAC , 2001, IEEE J. Solid State Circuits.

[5]  R. Schreier,et al.  Noise-shaped multbit D/A convertor employing unit elements , 1995 .

[6]  Luis Hernandez.  Binary weighted D/A converters with mismatch-shaping , 1997 .

[7]  S. Haykin,et al.  Adaptive Filter Theory , 1986 .

[8]  Ian Galton,et al.  Simplified logic for first-order and second-order mismatch-shaping digital-to-analog converters , 2001 .

[9]  Gabor C. Temes,et al.  Mismatch-shaping switching for two-capacitor DAC , 1998 .

[10]  Richard Schreier.  Mismatch-Shaping Digital-to-Analog Conversion , 1997 .

[11]  Akira Yasuda,et al.  A third-order ΔΣ modulator using second-order noise-shaping dynamic element matching , 1998, IEEE J. Solid State Circuits.

[12]  I. Fujimori,et al.  A 90 dB SNR, 2.5 MHz output rate ADC using cascaded multibit /spl Delta//spl Sigma/ modulation at 8x oversampling ratio , 2000, 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056).

[13]  K. Nguyen,et al.  A 113 dB SNR oversampling DAC with segmented noise-shaped scrambling , 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).

[14]  Ian Galton.  Spectral shaping of circuit errors in digital-to-analog converters , 1997 .

[15]  Terri S. Fiez,et al.  A spurious-free delta-sigma DAC using rotated data weighted averaging , 1999, Proceedings of the IEEE 1999 Custom Integrated Circuits Conference (Cat. No.99CH36327).

[16]  R. T. Baird,et al.  Linearity enhancement of multibit delta-sigma A/D and D/A converters using data weighted averaging , 1995 .

[17]  Ian Galton,et al.  The mismatch-noise PSD from a tree-structured DAC in a second-order /spl Delta//spl Sigma/ modulator with a midscale input , 2001, 2001 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.01CH37221).

[18]  Bruce A. Wooley,et al.  A 2.5-V sigma-delta modulator for broadband communications applications , 2001 .

[19]  I. Galton,et al.  An audio ADC delta-sigma modulator with 100 dB SINAD and 102 dB DR using a second-order mismatch-shaping DAC , 2000, Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044).