77–110GHz 90nm-CMOS receiver design

This manuscript details our latest 90nm CMOS W-band receiver design where the RF LNA, resistive mixer, IF differential amplifier and LO tripler have been integrated, thus allows the whole 77-110GHz spectrum to be down-converted into quasi-DC -33GHz using a much lower microwave frequency. In addition to being used in our broadband receiver array project, this W-band circuit is also eligible for the conventional 77/94GHz vehicular and surveillance applications. This 90nm-CMOS receiver with LO tripler has around -0.4dB conversion gain, 18dB noise figure, 48dB LO-IF isolation, and its chip size is 950-times-750μm2, with 114mW power dissipation at 1.3V DC bias.

[1]  P. Garcia,et al.  A Wideband W-Band Receiver Front-End in 65-nm CMOS , 2008, IEEE Journal of Solid-State Circuits.

[2]  Chung-Yu Wu,et al.  A 78 $\sim$ 102 GHz Front-End Receiver in 90 nm CMOS Technology , 2011, IEEE Microwave and Wireless Components Letters.

[3]  Lei Zhou,et al.  A W-band CMOS Receiver Chipset for Millimeter-Wave Radiometer Systems , 2011, IEEE Journal of Solid-State Circuits.

[4]  Pekka Kangaslahti,et al.  Technology developments for a scalable heterodyne MMIC array at W-band , 2011, 2011 41st European Microwave Conference.

[5]  Y. Baeyens,et al.  A 70–100GHz direct-conversion transmitter and receiver phased array chipset in 0.18µm SiGe BiCMOS technology , 2012, 2012 IEEE Radio Frequency Integrated Circuits Symposium.