Power-efficient accelerator allocation in adaptive dark silicon many-core systems
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[1] Edward T. Grochowski,et al. Larrabee: A many-Core x86 architecture for visual computing , 2008, 2008 IEEE Hot Chips 20 Symposium (HCS).
[2] Frank Vahid,et al. Dynamic tuning of configurable architectures: the AWW online algorithm , 2008, CODES+ISSS '08.
[3] John A. Nelder,et al. A Simplex Method for Function Minimization , 1965, Comput. J..
[4] Jung Ho Ahn,et al. McPAT: An integrated power, area, and timing modeling framework for multicore and manycore architectures , 2009, 2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).
[5] David Atienza,et al. A Mapping-Scheduling Algorithm for Hardware Acceleration on Reconfigurable Platforms , 2014, TRETS.
[6] Lieven Eeckhout,et al. Sniper: Exploring the level of abstraction for scalable and accurate parallel multi-core simulation , 2011, 2011 International Conference for High Performance Computing, Networking, Storage and Analysis (SC).
[7] Baochun Li,et al. Parallelized Progressive Network Coding With Hardware Acceleration , 2007, 2007 Fifteenth IEEE International Workshop on Quality of Service.
[8] Luca P. Carloni,et al. Accelerator Memory Reuse in the Dark Silicon Era , 2014, IEEE Computer Architecture Letters.
[9] Muhammad Shafique,et al. Optimizing the H.264/AVC Video Encoder Application Structure for Reconfigurable and Application-Specific Platforms , 2010, J. Signal Process. Syst..
[10] Ananth Kalyanaraman,et al. High-throughput, energy-efficient network-on-chip-based hardware accelerators , 2013, Sustain. Comput. Informatics Syst..
[11] Muhammad Usman Karim Khan,et al. Hardware-software collaborative complexity reduction scheme for the emerging HEVC intra encoder , 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[12] R.H. Dennard,et al. Design Of Ion-implanted MOSFET's with Very Small Physical Dimensions , 1974, Proceedings of the IEEE.
[13] Muhammad Shafique,et al. The EDA challenges in the dark silicon era , 2014, 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC).
[14] Alessandro Forin,et al. An online scheduler for hardware accelerators on general-purpose operating systems , 2010 .
[15] Swarup Bhunia,et al. Energy-efficient hardware acceleration through computing in the memory , 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[16] Jason Cong,et al. Architecture support for accelerator-rich CMPs , 2012, DAC Design Automation Conference 2012.
[17] Karthikeyan Sankaralingam,et al. Dark Silicon and the End of Multicore Scaling , 2012, IEEE Micro.
[18] Jean Andrian,et al. Energy Efficient Architecture Using Hardware Acceleration for Software Defined Radio Components , 2012, J. Inf. Process. Syst..