Two-dimensional analytic modeling of very thin SOI MOSFETs

An analytic solution of the Poisson's equation for MOSFETs on very thin SOI (silicon on insulator) was developed using an infinite series method. The calculation region includes the thin SOI and the gate and buried oxides. The results of this model were found to agree well with a two-dimensional (PISCES) simulation in the subthreshold region and the linear region with small V/sub DS/. This model is used to study the short-channel behavior of very small MOS transistors on thin SOI. It is found that with very thin SOI, short-channel effects are much reduced compared to bulk MOS transistors and depend on the bulk-substrate bias. The model also shows that it is possible to fabricate submicrometer transistors on very thin SOI even if the channel doping is nearly intrinsic. >

[1]  K. De Meyer,et al.  Two-dimensional numerical analysis of the floating region in SOI MOSFETs , 1988 .

[2]  V. L. Rideout,et al.  Very small MOSFET's for low-temperature operation , 1977, IEEE Transactions on Electron Devices.

[3]  Jason C. S. Woo,et al.  Design and performance of submicron MOSFETs on ultra-thin SOI for room temperature and cryogenic operation , 1988, Technical Digest., International Electron Devices Meeting.

[4]  S. Veeraraghavan,et al.  Short-channel effects in SOI MOSFETs , 1989 .

[5]  J. Plummer,et al.  A low-temperature NMOS technology with Cesium-implanted load devices , 1987, IEEE Transactions on Electron Devices.

[6]  High performance SOIMOSFET using ultra-thin SOI film , 1987, 1987 International Electron Devices Meeting.

[7]  K. K. Young Short-channel effect in fully depleted SOI MOSFETs , 1989 .

[8]  R. R. Troutman,et al.  VLSI limitations from drain-induced barrier lowering , 1979 .

[9]  T.N. Nguyen,et al.  Physical mechanisms responsible for short channel effects in MOS devices , 1981, 1981 International Electron Devices Meeting.

[10]  J.-P. Colinge,et al.  Hot-electron effects in Silicon-on-insulator n-channel MOSFET's , 1987, IEEE Transactions on Electron Devices.

[11]  Robert W. Dutton,et al.  Nonplanar VLSI device analysis using the solution of Poisson's equation , 1980 .

[12]  J. Colinge Transconductance of Silicon-on-insulator (SOI) MOSFET's , 1985, IEEE Electron Device Letters.

[13]  Yuan Taur,et al.  Submicrometer-channel CMOS for low-temperature operation , 1987, IEEE Transactions on Electron Devices.

[14]  James D. Meindl,et al.  Performance limits of CMOS ULSI , 1985 .

[15]  J. Colinge Reduction of kink effect in thin-film SOI MOSFETs , 1988, IEEE Electron Device Letters.

[16]  K. Tokunaga,et al.  Increased drain saturation current in ultra-thin silicon-on-insulator (SOI) MOS transistors , 1988, IEEE Electron Device Letters.

[17]  P. K. Vasudev,et al.  A High Performance Submicrometer CMOS/SOI Technology Using Ultrathin Silicon Films on Simox , 1987 .