Energy-Optimal Circuit Design

Energy efficiency is an emerging metric for the quality of integrated circuit designs. Applications ranging from wireless sensor networks to RFID tags to embedded microprocessors require extremely low power consumption to maintain good battery life. We advocate the use of aggressively scaled supply voltages in such applications to maximize energy efficiency. This paper reviews our recent progress in mapping out the low energy design space including the presence of an energy-optimal supply voltage, and also touches on complications arising from variability at low supply voltages. We conclude with a survey of open research directions in the ultra-low voltage design space.

[1]  David E. Culler,et al.  Lessons from a Sensor Network Expedition , 2004, EWSN.

[2]  R. Ho,et al.  Proximity communication , 2004, IEEE Journal of Solid-State Circuits.

[3]  David Blaauw,et al.  Analysis and mitigation of variability in subthreshold design , 2005, ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005..

[4]  David Blaauw,et al.  Theoretical and practical limits of dynamic voltage scaling , 2004, Proceedings. 41st Design Automation Conference, 2004..

[5]  A. Chandrakasan,et al.  A 256kb Sub-threshold SRAM in 65nm CMOS , 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.

[6]  Jeffrey A. Davis,et al.  The fundamental limit on binary switching energy for terascale integration (TSI) , 2000, IEEE Journal of Solid-State Circuits.

[7]  T. Sakurai,et al.  Analysis and design of inductive coupling and transceiver circuit for inductive inter-chip wireless superconnect , 2005, IEEE Journal of Solid-State Circuits.

[8]  A. Chandrakasan,et al.  A 180mV FFT processor using subthreshold circuit techniques , 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).

[9]  Bo Zhai,et al.  Performance and Variability Optimization Strategies in a Sub-200mV, 3.5pJ/inst, 11nW Subthreshold Processor , 2007, 2007 IEEE Symposium on VLSI Circuits.

[10]  Dale Teeters,et al.  Vanadia xerogel nanocathodes used in lithium microbatteries , 2003 .

[11]  Norman P. Jouppi,et al.  Single-ISA heterogeneous multi-core architectures: the potential for processor power reduction , 2003, Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36..

[12]  Joseph A. Paradiso,et al.  Energy scavenging for mobile and wireless electronics , 2005, IEEE Pervasive Computing.

[13]  M.P. Flynn,et al.  A Fully Integrated Auto-Calibrated SuperRegenerative Receiver , 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.

[14]  Kaushik Roy,et al.  Computing with subthreshold leakage: device/circuit/architecture co-design for ultralow-power subthreshold operation , 2005, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[15]  Larry L. Howell,et al.  Microbatteries for self-sustained hybrid micropower supplies , 2002 .

[16]  David Blaauw,et al.  Nanometer Device Scaling in Subthreshold Circuits , 2007, 2007 44th ACM/IEEE Design Automation Conference.

[17]  Sachin S. Sapatnekar,et al.  Mathematically assisted adaptive body bias (ABB) for temperature compensation in gigascale LSI systems , 2006, Asia and South Pacific Conference on Design Automation, 2006..

[18]  David Blaauw,et al.  Ultralow-voltage, minimum-energy CMOS , 2006, IBM J. Res. Dev..