Modeling NoC traffic locality and energy consumption with rent's communication probability distribution

In systems on chip, the energy consumed by the Network on Chip (NoC) depends heavily on the network traffic pattern. The higher the communication locality, the lower the energy consumption will be. In this paper, we use the Communication Probability Distribution (CPD) to model communication locality and energy consumption in NoC. Firstly, based on recent results showing that communication patterns of many parallel applications follow Rent's rule, we propose a Rent's rule [6] traffic generator. In this method, the probability of communication between cores is derived directly from Rent's rule, which results in CPDs displaying high locality. Next, we provide a model for predicting NoC energy consumption based on the CPD. The model was tested on two NoC systems and several workloads, including Rent's rule traffic, and obtained accurate results when compared to simulations. The results also show that Rent's rule traffic has lower energy consumption than commonly used synthetic workloads, due to its higher communication locality. Finally, we exploit the tunability of our traffic generator to study applications with different locality, analyzing the impact of the Rent's exponent on energy consumption.

[1]  Li-Shiuan Peh,et al.  A Statistical Traffic Model for On-Chip Interconnection Networks , 2006, 14th IEEE International Symposium on Modeling, Analysis, and Simulation.

[2]  Radu Marculescu,et al.  Energy-aware mapping for tile-based NoC architectures under performance constraints , 2003, ASP-DAC '03.

[3]  Dirk Stroobandt,et al.  The interpretation and application of Rent's rule , 2000, IEEE Trans. Very Large Scale Integr. Syst..

[4]  Jan M. Van Campenhout,et al.  Rent's rule and parallel programs: characterizing network traffic behavior , 2008, SLIP '08.

[5]  James D. Meindl,et al.  A stochastic wire length distribution for gigascale integration (GSI) , 1997, Proceedings of CICC 97 - Custom Integrated Circuits Conference.

[6]  Dirk Stroobandt,et al.  A Priori Wire Length Estimates for Digital Design , 2001 .

[7]  Sriram R. Vangal,et al.  A 5-GHz Mesh Interconnect for a Teraflops Processor , 2007, IEEE Micro.

[8]  Henry Hoffmann,et al.  The Raw Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs , 2002, IEEE Micro.

[9]  Robert Tappan Morris,et al.  Span: An Energy-Efficient Coordination Algorithm for Topology Maintenance in Ad Hoc Wireless Networks , 2002, Wirel. Networks.

[10]  Partha Pratim Pande,et al.  Effect of traffic localization on energy dissipation in NoC-based interconnect , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[11]  Jeong-Gun Lee,et al.  Implications of Rent's Rule for NoC Design and Its Fault-Tolerance , 2007, First International Symposium on Networks-on-Chip (NOCS'07).

[12]  Andrew B. Kahng,et al.  ORION 2.0: A fast and accurate NoC power and area model for early-stage design space exploration , 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

[13]  William J. Dally,et al.  Principles and Practices of Interconnection Networks , 2004 .

[14]  Fernando Gehm Moraes,et al.  Mapping Embedded Systems onto NoCs - The Traffic Effect on Dynamic Energy Estimation , 2005, 2005 18th Symposium on Integrated Circuits and Systems Design.