A stereo 97 dB SNR audio sigma-delta ADC

High-performance VLSI implementations of sigma-delta audio ADCs at present use separate dies for digital and analog parts. In the circuit presented in this paper, the interference in the analog part is negligible, enabling use of the same die for the entire converter. The converter has a 44.1 kHz sampling rate, oversampling ratio of 64, and the passband edge at 20 kHz.<<ETX>>

[1]  Hannu Tenhunen,et al.  A 50 MHz Cascaded Sigma-delta A/d Modulator , 1992, 1992 Proceedings of the IEEE Custom Integrated Circuits Conference.