A Low-Power High-Speed Spintronics-Based Neuromorphic Computing System Using Real-Time Tracking Method

In spintronic-based neuromorphic computing systems (NCSs), the switching of magnetic moment in a magnetic tunnel junction (MTJ) is used to mimic neuron firing. However, the stochastic switching behavior of the MTJ and process variations effect lead to a significant increase in the stimulation time of such NCSs. Moreover, current NCSs need an extra phase to read the MTJ state after stimulation, which is in contrast with real neuron functionality in human body. In this paper, the read circuit is replaced with a proposed real-time sensing (RTS) circuit. The RTS circuit tracks the MTJ state during stimulation phase. As soon as switching happens, the RTS circuit terminates the MTJ current and stimulates the post neuron. Hence, the RTS circuit not only improves the energy consumption and speed, but also makes the operation of the NCS similar to real neuron functionality. The simulation results in 65-nm CMOS technology confirm that the energy consumption and speed of the proposed RTS-based NCS are improved at least by 40% and 2.22X compared with a typical NCS, respectively. Finally, utilizing the RTS-based NCS in image processing applications, such as character recognition and edge detection, can lead to 90.3% improvement in energy delay products compared with the typical NCS.

[1]  Jaeyoung Park,et al.  Variable-energy write STT-RAM architecture with bit-wise write-completion monitoring , 2013, International Symposium on Low Power Electronics and Design (ISLPED).

[2]  D. Dimitrov,et al.  Thermal fluctuation effects on spin torque induced switching: Mean and variations , 2008 .

[3]  Kaushik Roy,et al.  Ultra low energy analog image processing using spin based neurons , 2012, 2012 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH).

[4]  Meng-Fan Chang,et al.  An Offset-Tolerant Fast-Random-Read Current-Sampling-Based Sense Amplifier for Small-Cell-Current Nonvolatile Memory , 2013, IEEE Journal of Solid-State Circuits.

[5]  Shoji Ikeda,et al.  Time-Resolved Switching Characteristic in Magnetic Tunnel Junction with Spin Transfer Torque Write Scheme , 2012 .

[6]  V. Javerliac,et al.  SPICE modelling of magnetic tunnel junctions written by spin-transfer torque , 2010 .

[7]  Yiran Chen,et al.  Asymmetry of MTJ switching and its implication to STT-RAM designs , 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[8]  H. Ohno,et al.  Single-shot time-resolved measurements of nanosecond-scale spin-transfer induced switching: stochastic versus deterministic aspects. , 2008, Physical review letters.

[9]  Wenqing Wu,et al.  Probabilistic design methodology to improve run-time stability and performance of STT-RAM caches , 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[10]  Jun Yang,et al.  Energy reduction for STT-RAM using early write termination , 2009, 2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers.

[11]  Kaushik Roy,et al.  STT-SNN: A Spin-Transfer-Torque Based Soft-Limiting Non-Linear Neuron for Low-Power Artificial Neural Networks , 2014, IEEE Transactions on Nanotechnology.

[12]  Supriyo Datta,et al.  Modular Spintronics Library , 2013 .

[13]  Seong-Ook Jung,et al.  Offset-Canceling Current-Sampling Sense Amplifier for Resistive Nonvolatile Memory in 65 nm CMOS , 2017, IEEE Journal of Solid-State Circuits.

[14]  Franziska Hoffmann,et al.  Design Of Analog Cmos Integrated Circuits , 2016 .

[15]  Kaushik Roy,et al.  Spin-Transfer Torque Devices for Logic and Memory: Prospects and Perspectives , 2016, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[16]  Uri C. Weiser,et al.  TEAM: ThrEshold Adaptive Memristor Model , 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

[17]  Kaushik Roy,et al.  Spin Neurons: A Possible Path to Energy-Efficient Neuromorphic Computers , 2013, ArXiv.

[18]  E. Lehtonen,et al.  CNN using memristors for neighborhood connections , 2010, 2010 12th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA 2010).

[19]  Robert G. Meyer,et al.  Analysis and Design of Analog Integrated Circuits , 1993 .

[20]  Mehdi Baradaran Tahoori,et al.  Asynchronous Asymmetrical Write Termination (AAWT) for a low power STT-MRAM , 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[21]  F. Prégaldiny,et al.  Compact modeling of magnetic tunnel junction , 2008, 2008 Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference.

[22]  Kaushik Roy,et al.  Spin-Transfer Torque Magnetic neuron for low power neuromorphic computing , 2015, 2015 International Joint Conference on Neural Networks (IJCNN).

[23]  Arindam Basu,et al.  Neural dynamics in reconfigurable silicon , 2010, ISCAS.

[24]  Kaushik Roy,et al.  Proposal for an All-Spin Artificial Neural Network: Emulating Neural and Synaptic Functionalities Through Domain Wall Motion in Ferromagnets , 2015, IEEE Transactions on Biomedical Circuits and Systems.

[25]  Farshad Moradi,et al.  STT-RAM Energy Reduction Using Self-Referenced Differential Write Termination Technique , 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[26]  Z. Diao,et al.  Spin-transfer torque switching in magnetic tunnel junctions and spin-transfer torque random access memory , 2007 .

[27]  J. Yang,et al.  Switching dynamics in titanium dioxide memristive devices , 2009 .

[28]  Denny D. Tang,et al.  Magnetic Memory: Fundamentals and Technology , 2010 .

[29]  K. Roy,et al.  Physics-Based SPICE-Compatible Compact Model for Simulating Hybrid MTJ/CMOS Circuits , 2013, IEEE Transactions on Electron Devices.

[30]  Kaushik Roy,et al.  Probabilistic Deep Spiking Neural Systems Enabled by Magnetic Tunnel Junction , 2016, IEEE Transactions on Electron Devices.

[31]  Paul E. Hasler,et al.  Floating gate synapses with spike time dependent plasticity , 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

[32]  Abhronil Sengupta,et al.  A Vision for All-Spin Neural Networks: A Device to System Perspective , 2016, IEEE Transactions on Circuits and Systems I: Regular Papers.

[33]  K. Roy,et al.  Boolean and non-Boolean computation with spin devices , 2012, 2012 International Electron Devices Meeting.