A Wide-range 130-nm CMOS Statistic-based Frequency Ratio Calculator
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[1] Poras T. Balsara,et al. Numerical Model of an Injection-Locked Wideband Frequency Modulator for Polar Transmitters , 2017, IEEE Transactions on Microwave Theory and Techniques.
[2] David Blaauw,et al. 8.4 A 2.5ps 0.8-to-3.2GHz bang-bang phase- and frequency-detector-based all-digital PLL with noise self-adjustment , 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).
[3] Yue Chen,et al. A 3.5–6.8GHz wide-bandwidth DTC-assisted fractional-N all-digital PLL with a MASH ΔΣ TDC for low in-band phase noise , 2016, ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference.
[4] Yue Chen,et al. A 3.5–6.8-GHz Wide-Bandwidth DTC-Assisted Fractional-N All-Digital PLL With a MASH $\Delta \Sigma $ -TDC for Low In-Band Phase Noise , 2017, IEEE Journal of Solid-State Circuits.
[5] Taeik Kim,et al. 14.4 A 5GHz −95dBc-reference-Spur 9.5mW digital fractional-N PLL using reference-multiplied time-to-digital converter and reference-spur cancellation in 65nm CMOS , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.
[6] Robert Bogdan Staszewski,et al. An Ultracompact 9.4–14.8-GHz Transformer-Based Fractional-N All-Digital PLL in 40-nm CMOS , 2017, IEEE Transactions on Microwave Theory and Techniques.