An Efficient Algorithm for Online Management of 2D Area of Partially Reconfigurable FPGAs

Partially runtime-reconfigurable (PRTR) FPGAs allow hardware tasks to be placed and removed dynamically at runtime. We present an efficient algorithm for finding the complete set of maximal empty rectangles on a 2D PRTR FPGA, which is useful for online placement and scheduling of HW tasks. The algorithm is incremental and only updates the local region affected by each task addition or removal event. We use simulation experiments to evaluate its performance and compare to related work

[1]  Marco Platzner,et al.  Fast online task placement on FPGAs: free space partitioning and 2D-hashing , 2003, Proceedings International Parallel and Distributed Processing Symposium.

[2]  Jürgen Teich,et al.  A new approach for on-line placement on reconfigurable devices , 2004, 18th International Parallel and Distributed Processing Symposium, 2004. Proceedings..

[3]  Ranga Vemuri,et al.  An efficient algorithm for finding empty space for online FPGA placement , 2004, Proceedings. 41st Design Automation Conference, 2004..

[4]  Majid Sarrafzadeh,et al.  Fast Template Placement for Reconfigurable Computing Systems , 2000, IEEE Des. Test Comput..