Self-checking method for fault-tolerant control

The invention discloses a self-checking method for fault-tolerant control. The self-checking method comprises the following steps that: data input signals of a system are separated into three paths and enter modules respectively; three modules input data into voters in pairs respectively to perform voting by word; output signals of the three voters are judged by a logic gate; if the signals are judged to be 0, the operation is switched to a voted decision logic, which shows that at least more than two outputs in the three modules are accordant; when all bits of the three modules are matched completely, the voters output the output of any module as a final output, and when two modules are matched, the voters output any output in the two modules; if the signals are judged to be 1, the operation is switched in an automatic converting unit, which shows that all the three modules are not matched; then the voters generate fault signals, send a pulse signal to the converting unit to ensure that the converting unit switches the voters to voters by bit; and then voting by bit is performed on the three modules, and the result is output. The self-checking method ensures the reliability of the system.