Low-Power CMOS Power Amplifier for 3.1–10.6 GHz Ultra-Wideband Transmitter

ABSTRACT This paper proposes the design of a low-power ultra-wideband (UWB) power amplifier (PA) in 0.18 µm complementary metal oxide semiconductor (CMOS) technology. With the common-gate configuration employed as the input stage, the broad-band input matching is obtained. The UWB PA employs a forward body biasing technique to reduce power consumption. Meanwhile, in driver stage and power stage of this PA, the resistive feed-back technique with an inter-stage inductor and a series peaking inductors is used to achieve the wider and gain flatness. The post-layout simulation results indicated that the input return loss (S11) was less than −15.8 dB, output return loss (S22) was less than −8.3 dB, and average power gain of 10.6 dB with a flatness about 1.0 dB. The output 1 dB compression point was about 3 dBm. Moreover, a very low power consumption of 14.3 mW was achieved with a die area of 0.96 × 0.95 mm2.

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