A new inverter-based charge pump circuit with high conversion ratio and high power efficiency
暂无分享,去创建一个
[1] Ken Takeuchi,et al. Circuit techniques for a 1.8-V-only NAND flash memory , 2002, IEEE J. Solid State Circuits.
[2] J. F. Dickson,et al. On-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique , 1976 .
[3] Jieh-Tsorng Wu,et al. MOS charge pumps for low-voltage operation , 1998, IEEE J. Solid State Circuits.
[4] Gaetano Palumbo,et al. Charge pump circuits with only capacitive loads: optimized design , 2006, IEEE Transactions on Circuits and Systems II: Express Briefs.
[5] Luigi Colalongo,et al. Charge Pump Architectures Based on Dynamic Gate Control of the Pass-Transistors , 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[6] Y. J. Park,et al. A new charge pump without degradation in threshold voltage due to body effect [memory applications] , 2000, IEEE Journal of Solid-State Circuits.
[7] Chingwei Yeh,et al. Design techniques for single-low-V/sub DD/ CMOS systems , 2005 .
[8] M. Pasotti,et al. Power efficient charge pump in deep submicron standard CMOS technology , 2003, Proceedings of the 27th European Solid-State Circuits Conference.
[9] W. Weber,et al. Charge sharing concept and new clocking scheme for power efficiency and electromagnetic emission improvement of boosted charge pumps , 2000, IEEE Journal of Solid-State Circuits.
[10] H. Alan Mantooth,et al. A technique to increase the efficiency of high-voltage charge pumps , 2006, IEEE Transactions on Circuits and Systems II: Express Briefs.
[11] Ming-Dou Ker,et al. Ultra-High-Voltage Charge Pump Circuit in Low-Voltage Bulk CMOS Processes With Polysilicon Diodes , 2007, IEEE Transactions on Circuits and Systems II: Express Briefs.
[12] M. Ker,et al. On-Chip High-Voltage Charge Pump Circuit in Standard CMOS Processes With Polysilicon Diodes , 2005, 2005 IEEE Asian Solid-State Circuits Conference.