Expression-Level Parallelism for Distributed Spice Circuit Simulation

Distributed system-level simulation among coordinated, heterogeneous simulators requires communication and synchrony to preserve event causality. Once achieved, multiple coordinated, distributed instances of a single simulator not originally written for internal parallelism can be used to conduct the expression-level parallel execution of a model partitioned into subsystems, such that each subsystem is assigned to an individual simulator. Using a Kahn Process Network simulation back plane for coordination, and a custom Xspice TCP/IP socket device for interfacing, expression-level distributed simulation was applied to observe a decrease of up to 1/52 times the transient analysis time of the same circuit in a single Ngspice instance, without modifying the Ngspice kernel or host execution environment. Up to 128 independent Ngspice instances were coordinated in parallel with this method, with a selectable tradeoff in speed versus accuracy.

[1]  Soonhoi Ha,et al.  A hardware software cosimulation backplane with automatic interface generation , 1998, Proceedings of 1998 Asia and South Pacific Design Automation Conference.

[2]  Barbara M. Chapman,et al.  OpenMP Implementation of SPICE3 Circuit Simulator , 2007, International Journal of Parallel Programming.

[3]  Gabriela Nicolescu,et al.  Formal Definitions of Simulation Interfaces in a Continuous/Discrete Co-Simulation Tool , 2006, Seventeenth IEEE International Workshop on Rapid System Prototyping (RSP'06).

[4]  Yiannos Manoli,et al.  2001 International Conference on Computer Design , 2003 .

[5]  Chung-Kuan Cheng,et al.  Parallel transistor level circuit simulation using domain decomposition methods , 2009, 2009 Asia and South Pacific Design Automation Conference.

[6]  Wei Dong,et al.  WavePipe: Parallel transient simulation of analog and digital circuits on multi-core shared-memory machines , 2008, 2008 45th ACM/IEEE Design Automation Conference.

[7]  Dylan Pfeifer,et al.  Kahn process networks applied to distributed heterogeneous HW/SW cosimulation , 2011, 2011 Electronic System Level Synthesis Conference (ESLsyn).

[8]  Stephen John Turner,et al.  Causal order based time warp: a tradeoff of optimism , 2003, Proceedings of the 2003 Winter Simulation Conference, 2003..

[9]  Nachiket Kapre,et al.  Accelerating SPICE Model-Evaluation using FPGAs , 2009, 2009 17th IEEE Symposium on Field Programmable Custom Computing Machines.

[10]  Alexandre M. Amory,et al.  A heterogeneous and distributed co-simulation environment [hardware/software] , 2002 .

[11]  Alexandre M. Amory,et al.  A Heterogeneous and Distributed Co-Simulation Environment , 2002 .

[12]  Sunil P. Khatri,et al.  Fast circuit simulation on graphics processing units , 2009, 2009 Asia and South Pacific Design Automation Conference.

[13]  H. Baraka,et al.  An architecture of distributed co-simulation backplane , 1999, 42nd Midwest Symposium on Circuits and Systems (Cat. No.99CH36356).

[14]  Eric R. Keiter,et al.  The Xyce Parallel Electronic Simulator - An Overview , 2000 .

[15]  Klaus D. Müller-Glaser,et al.  A backplane approach for cosimulation in high-level system specification environments , 1995, Proceedings of EURO-DAC. European Design Automation Conference.

[16]  Gilles Kahn,et al.  The Semantics of a Simple Language for Parallel Programming , 1974, IFIP Congress.

[17]  C.J.R. Shi,et al.  Distributed event-driven simulation of VHDL-SPICE mixed-signal circuits , 2001, Proceedings 2001 IEEE International Conference on Computer Design: VLSI in Computers and Processors. ICCD 2001.

[18]  Goichi Yokomizo,et al.  A parallel and accelerated circuit simulator with precise accuracy , 2002, Proceedings of ASP-DAC/VLSI Design 2002. 7th Asia and South Pacific Design Automation Conference and 15h International Conference on VLSI Design.

[19]  Alberto L. Sangiovanni-Vincentelli,et al.  Quo Vadis, SLD? Reasoning About the Trends and Challenges of System Level Design , 2007, Proceedings of the IEEE.

[20]  Edward A. Lee,et al.  Comparing models of computation , 1996, Proceedings of International Conference on Computer Aided Design.