A 6-bit subranging ADC with single CDAC interpolation

In this paper, a 6-bit subranging Analog to Digital Converter (ADC) using a new interpolation method is presented. The proposed interpolation method utilizes one differential input signal and two DC voltages. Therefore, the area of Digital to Analog Converter (DAC) is reduced half in comparison to the previous interpolation which utilizes two differential signals. The ADC is implemented in 90 nm process and achieves total power of 3.3 mW, ENOB of 5.8-bits, FoM of 0.12 pJ/conv. at 500 MS/s in simulation.