A Complementary Resistive Switch-Based Crossbar Array Adder
暂无分享,去创建一个
[1] S. Bhunia,et al. A Scalable Memory-Based Reconfigurable Computing Framework for Nanoscale Crossbar , 2012, IEEE Transactions on Nanotechnology.
[2] T.G. Noll,et al. Fundamental analysis of resistive nano-crossbars for the use in hybrid Nano/CMOS-memory , 2007, ESSCIRC 2007 - 33rd European Solid-State Circuits Conference.
[3] R. Dittmann,et al. Redox‐Based Resistive Switching Memories – Nanoionic Mechanisms, Prospects, and Challenges , 2009, Advanced materials.
[4] Rainer Waser,et al. Complementary resistive switches for passive nanocrossbar memories. , 2010, Nature materials.
[5] M. Kozicki,et al. Cation-based resistance change memory , 2013 .
[6] Mika Laiho,et al. Stateful implication logic with memristors , 2009, 2009 IEEE/ACM International Symposium on Nanoscale Architectures.
[7] S. Menzel,et al. Simulation of multilevel switching in electrochemical metallization memory cells , 2012 .
[8] D. Stewart,et al. The missing memristor found , 2008, Nature.
[9] Anupam Chattopadhyay,et al. Combinational logic synthesis for material implication , 2011, 2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip.
[10] Leon O. Chua. Resistance switching memories are memristors , 2011 .
[11] R. Waser,et al. Electrode kinetics of Cu–SiO2-based resistive switching cells: Overcoming the voltage-time dilemma of electrochemical metallization memories , 2009 .
[12] R Waser,et al. Compact modeling of CRS devices based on ECM cells for memory, logic and neuromorphic applications. , 2013, Nanotechnology.
[13] Uri C. Weiser,et al. Memristor-Based Material Implication (IMPLY) Logic: Design Principles and Methodologies , 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[14] Seth Copen Goldstein,et al. Molecular electronics: from devices and interconnect to circuits and architecture , 2003, Proc. IEEE.
[15] D. Strukov,et al. CMOL FPGA: a reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices , 2005 .
[16] Rainer Waser,et al. Ag/GeSx/Pt-based complementary resistive switches for hybrid CMOS/Nanoelectronic logic and memory architectures , 2013, Scientific Reports.
[17] Swarup Bhunia,et al. Computing with nanoscale memory: Model and architecture , 2009, 2009 IEEE/ACM International Symposium on Nanoscale Architectures.
[18] Anne Siemon,et al. Applicability of Well-Established Memristive Models for Simulations of Resistive Switching Devices , 2014, IEEE Transactions on Circuits and Systems I: Regular Papers.
[19] Matthew D. Pickett,et al. Physics-based memristor models , 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).
[20] B. Hoefflinger. ITRS: The International Technology Roadmap for Semiconductors , 2011 .
[21] J. B. Gosling. European solid-state circuits conference , 1979 .
[22] U. Böttger,et al. Beyond von Neumann—logic operations in passive crossbar arrays alongside memory operations , 2012, Nanotechnology.
[23] R. Dittmann,et al. Origin of the Ultra‐nonlinear Switching Kinetics in Oxide‐Based Resistive Switches , 2011 .
[24] Gregory S. Snider,et al. ‘Memristive’ switches enable ‘stateful’ logic operations via material implication , 2010, Nature.
[25] An Chen,et al. A Comprehensive Crossbar Array Model With Solutions for Line Resistance and Nonlinear Device Characteristics , 2013, IEEE Transactions on Electron Devices.
[26] Rainer Waser,et al. Ag/GeS x /Pt-based complementary resistive switches for hybrid CMOS/ Nanoelectronic logic and memory , 2013 .