Model checking timed automata : techniques and applications

Model checking is a technique to automatically analyse systems that have been modeled in a formal language. The timed automaton framework is such a formal language. It is suitable to model many realistic problems in which time plays a central role. Examples are distributed algorithms, protocols, embedded software and scheduling problems. The main problem with model checking is the exponential growth of the state space as models become larger (also known as the 'state space explosion' problem). This thesis consists of six research papers. Three of these contribute theory to alleviate the state space explosion problem. The other three demonstrate the practical use of model checking technology by applying it to realistic case studies.

[1]  B. D. Fluiter Algorithms for graphs of small treewidth , 1997 .

[2]  Arne Skou,et al.  Formal Modeling and Analysis of an Audio/Video Protocol: An Industrial Case Study Using UPPAAL , 1997 .

[3]  Holger Hermanns,et al.  Synthesis and stochastic assessment of schedules for lacquer production , 2004, First International Conference on the Quantitative Evaluation of Systems, 2004. QEST 2004. Proceedings..

[4]  D. Turi,et al.  Functional Operational Semantics and its Denotational Dual , 1996 .

[5]  Thomas A. Henzinger,et al.  HYTECH: a model checker for hybrid systems , 1997, International Journal on Software Tools for Technology Transfer.

[6]  Rajeev Alur,et al.  A Theory of Timed Automata , 1994, Theor. Comput. Sci..

[7]  Satoshi Yamane,et al.  The symbolic model-checking for real-time systems , 1996, Proceedings of the Eighth Euromicro Workshop on Real-Time Systems.

[8]  Diego Garbervetsky,et al.  ObsSlice: A Timed Automata Slicer Based on Observers , 2004, CAV.

[9]  A. M. Geerling,et al.  Transformational development of data-parallel algorithms , 1996 .

[10]  Sérgio Vale Aguiar Campos,et al.  Symbolic Model Checking , 1993, CAV.

[11]  Martijn Hendriks,et al.  Enhancing Uppaal by Exploiting Symmetry , 2002 .

[12]  M. T. Ionita,et al.  Scenario-based system architecting : a systematic approach to developing future-proof system architectures , 2005 .

[13]  Natarajan Shankar,et al.  PVS: A Prototype Verification System , 1992, CADE.

[14]  Maurice H. ter Beek,et al.  Team Automata: A Formal Approach to the Modeling of Collaboration Between System Components , 2003 .

[15]  Mohammad Reza Mousavi,et al.  Structuring structural operational semantics , 2005 .

[16]  Rmc Rene Ahn,et al.  Agents, objects and events : a computational approach to knowledge, observation and communication , 2001 .

[17]  D. Bosnacki Enhancing state space reduction techniques for model checking , 2001 .

[18]  Bernhard Schätz,et al.  Model-Based Development of Embedded Systems , 2002, OOIS Workshops.

[19]  Farn Wang,et al.  Symmetric Symbolic Safety-Analysis of Concurrent Software with Pointer Data Structures , 2002, FORTE.

[20]  Pierre Wolper,et al.  The Power of QDDs , 1997 .

[21]  Somesh Jha,et al.  Exploiting symmetry in temporal logic model checking , 1993, Formal Methods Syst. Des..

[22]  G Georgina Fabian,et al.  A language and simulator for hybrid systems , 1999 .

[23]  Frits W. Vaandrager,et al.  Distributing Timed Model Checking - How the Search Order Matters , 2000, CAV.

[24]  A. Prasad Sistla,et al.  Symmetry and model checking , 1993, Formal Methods Syst. Des..

[25]  G Goce Naumoski,et al.  A discrete-event simulator for systems engineering , 1998 .

[26]  Tadao Murata,et al.  Petri nets: Properties, analysis and applications , 1989, Proc. IEEE.

[27]  R Ronald Ruimerman,et al.  Modeling and remodeling in bone tissue , 2005 .

[28]  Kim G. Larsen,et al.  As Cheap as Possible: Efficient Cost-Optimal Reachability for Priced Timed Automata , 2001, CAV.

[29]  A. T. Hofkamp,et al.  Reactive machine control : a simulation approach using chi , 2001 .

[30]  Stuart Cheshire,et al.  Dynamic Configuration of IPv4 Link-Local Addresses , 2005, RFC.

[31]  Joost Visser,et al.  Generic traversal over typed source code representations , 2003 .

[32]  Daniel R. Tauritz,et al.  Adaptive Information Filtering: Concepts and Algorithms , 2002 .

[33]  Kurt Jensen Condensed state spaces for symmetrical Coloured Petri Nets , 1996, Formal Methods Syst. Des..

[34]  Michael Pinedo,et al.  Scheduling: Theory, Algorithms, and Systems , 1994 .

[35]  P. Severi Normalisation in lambda calculus and its relation to type inference , 1996 .

[36]  Jaap-Henk Hoepman,et al.  Communication, synchronization and fault tolerance , 1996 .

[37]  Sergio Yovine,et al.  Computing Optimal Operation Schemes for Chemical Plants in Multi-batch Mode , 2000, HSCC.

[38]  Gerd Behrmann,et al.  Adding Symmetry Reduction to Uppaal , 2003, FORMATS.

[39]  Jpl John Segers Algorithms for the simulation of surface processes , 1999 .

[40]  Mariëlle Stoelinga,et al.  Alea jacta est : verification of probabilistic, real-time and parametric systems , 2002 .

[41]  Kim G. Larsen,et al.  Lower and upper bounds in zone-based abstractions of timed automata , 2004, International Journal on Software Tools for Technology Transfer.

[42]  Sriram K. Rajamani,et al.  Automatically validating temporal safety properties of interfaces , 2001, SPIN '01.

[43]  D Dmitri Chkliaev,et al.  Mechanical verification of concurrency control and recovery protocols , 2001 .

[44]  Thomas Hune,et al.  Modeling a Language for Embedded Systems in Timed Automata , 2000 .

[45]  Joao Paulo Saraiva,et al.  Purely Functional Implementation of Attribute Grammars , 1999 .

[46]  Nancy A. Lynch,et al.  Hierarchical correctness proofs for distributed algorithms , 1987, PODC '87.

[47]  F.A.M. van den Beuken,et al.  A functional approach to syntax and typing , 1997 .

[48]  M. Oliver Möller Parking can get you there faster - Model Augmentation to Speed up Real-Time Model-Checking , 2002, Electron. Notes Theor. Comput. Sci..

[49]  Farn Wang,et al.  Efficient Data Structure for Fully Symbolic Verification of Real-Time Software Systems , 2000, TACAS.

[50]  David L. Dill,et al.  Better verification through symmetry , 1996, Formal Methods Syst. Des..

[51]  Louise Elgaard The Symmetry Method for Coloured Petri Nets , 2002 .

[52]  James C. Corbett,et al.  Bandera: extracting finite-state models from Java source code , 2000, ICSE.

[53]  Dennis Dams,et al.  Abstract interpretation and partition refinement for model checking , 1996 .

[54]  Jjd Joep Aerts Random redundant storage for video on demand , 2003 .

[55]  Peter Achten,et al.  Interactive functional programs: models, methods, and implementation , 1996 .

[56]  N.J.M. van den Nieuwelaar,et al.  Supervisory machine control by predictive-reactive scheduling , 2004 .

[57]  J. Wessels,et al.  Faculty of Mathematics and Computing Science , 1988 .

[58]  Leslie Lamport,et al.  Real-Time Model Checking Is Really Simple , 2005, CHARME.

[59]  Erik Harald Saaman,et al.  Another formal specification language , 2000 .

[60]  Oded Maler,et al.  Task graph scheduling using timed automata , 2003, Proceedings International Parallel and Distributed Processing Symposium.

[61]  Cruz Filipe,et al.  Constructive real analysis : a type-theoretical formalization and applications , 2004 .

[62]  Kim G. Larsen,et al.  A Tutorial on Uppaal , 2004, SFM.

[63]  Ka Lok Man,et al.  Formal specification and analysis of hybrid systems , 2006 .

[64]  Marcel Verhoef,et al.  Timed automata based analysis of embedded system architectures , 2006, IPDPS.

[65]  Simona Orzan,et al.  On Distributed Verification and Verified Distribution , 2004 .

[66]  Nancy A. Lynch,et al.  A Framework for Modeling Timed Systems with Restricted Hybrid Automata , 2003, RTSS 2003.

[67]  Joseph Sifakis,et al.  On the Synthesis of Discrete Controllers for Timed Systems (An Extended Abstract) , 1995, STACS.

[68]  Peter Verbaan,et al.  The Computational Complexity of Evolving Systems , 2006 .

[69]  J. P. Warners,et al.  Nonlinear approaches to satisfiability problems , 1999 .

[70]  Dragan Bosnacki,et al.  A Heuristic for Symmetry Reductions with Scalarsets , 2001, FME.

[71]  Reinder J. Bril,et al.  Real-time scheduling for media processing using conditionally guaranteed budgets , 2004 .

[72]  Sebastian Maneth,et al.  Models of tree translation , 2004 .

[73]  Edmund M. Clarke,et al.  Deadlock prevention in flexible manufacturing systems using symbolic model checking , 1996, Proceedings of IEEE International Conference on Robotics and Automation.

[74]  Gabriele Lenzini,et al.  Integration of Analysis Techniques in Security and Fault-Tolerance , 2005 .

[75]  Bengt Jonsson,et al.  Probabilistic Process Algebra , 2001 .

[76]  Dick Alstein,et al.  Distributed algorithms for hard real-time systems , 1996 .

[77]  Jurriaan Hage,et al.  Structural Aspects Of Switching Classes , 2001 .

[78]  Lex Heerink,et al.  Ins and Outs in Refusal Testing , 1998 .

[79]  Kim G. Larsen,et al.  Exact Acceleration of Real-Time Model Checking , 2002, Theory and Practice of Timed Systems @ ETAPS.

[80]  B. Gebremichael-Tesfagiorgis,et al.  Analysis of a Protocol for Dynamic Configuration of IPv4 Link Local Addresses Using Uppaal , 2006 .

[81]  J. Blanco Definability with the State Operator in Process Algebra , 1995 .

[82]  Pierre Wolper,et al.  Symbolic Verification with Periodic Sets , 1994, CAV.

[83]  Nancy A. Lynch,et al.  An introduction to input/output automata , 1989 .

[84]  David L. Dill,et al.  Timing Assumptions and Verification of Finite-State Concurrent Systems , 1989, Automatic Verification Methods for Finite State Systems.

[85]  J Jan Zwanenburg,et al.  Object-oriented concepts and proof rules : formalization in type theory and implementation in Yarrow , 1999 .

[86]  Leon Moonen,et al.  Exploring software systems , 2003, International Conference on Software Maintenance, 2003. ICSM 2003. Proceedings..

[87]  Martijn M. Schrage,et al.  Proxima: a presentation-oriented editor for structured documents , 2000 .

[88]  F. Bartels,et al.  On Generalised Coinduction and Probabilistic Specification Formats , 2004 .

[89]  Ana Sokolova,et al.  Coalgebraic analysis of probabilistic systems , 2005 .

[90]  Ts Ed Voermans Inductive datatypes with laws and subtyping : a relational model , 1999 .

[91]  Dino Salvo Distefano,et al.  On model checking the dynamics of object-based software : a foundational approach , 2003 .

[92]  Nwa Norbert Arends,et al.  A systems engineering specification formalism , 1996 .

[93]  M. Franssen Cocktail : a tool for deriving correct programs , 2000 .

[94]  Edmund M. Clarke,et al.  Characterizing Finite Kripke Structures in Propositional Temporal Logic , 1988, Theor. Comput. Sci..

[95]  Twan Laan The evolution of type theory in logic and mathematics , 1997 .

[96]  Stefan Blom,et al.  Term Graph Rewriting. Syntax and semantics , 2001 .

[97]  Goran Frehse,et al.  Compositional verification of hybrid systems using simulation relations , 2005 .

[98]  Alan J. Hu,et al.  Protocol verification as a hardware design aid , 1992, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors.

[99]  Marcel Kyas,et al.  Verifying OCL specifications of UML models: tool support and compositionakity , 2006 .

[100]  Wang Yi,et al.  Timed Automata: Semantics, Algorithms and Tools , 2003, Lectures on Concurrency and Petri Nets.

[101]  Kim Guldstrand Larsen,et al.  Model-Checking Real-Time Control Programs. Verifying LEGO Mindstorms Systems Using UPPAAL , 1999 .

[102]  V Victor Bos,et al.  Formal specification and analysis of industrial systems , 2002 .

[103]  Klaus Havelund,et al.  Model Checking Programs , 2004, Automated Software Engineering.

[104]  Wpaj Wil Michiels Performance ratios for the differencing method , 2004 .

[105]  Frits W. Vaandrager,et al.  Model checker aided design of a controller for a wafer scanner , 2006, International Journal on Software Tools for Technology Transfer.

[106]  Sean R Eddy,et al.  What is dynamic programming? , 2004, Nature Biotechnology.

[107]  Stephan Merz,et al.  Model Checking , 2000 .

[108]  Bernard Berthomieu,et al.  Time Petri Nets for Analyzing and Verifying Time Dependent Communication Protocols , 1983, Protocol Specification, Testing, and Verification.

[109]  Aa Twan Basten,et al.  In terms of nets : system design with Petri nets and process algebra , 1998 .

[110]  Thomas Wolle,et al.  Computational aspects of treewidth : Lower bounds and network reliability , 2005 .

[111]  Joost-Pieter Katoen,et al.  Embedded Software Analysis with MOTOR , 2004, SFM.

[112]  Cj Roel Bloo,et al.  Preservation of termination for explicit substitution , 1997 .

[113]  Cheun Ngen Chong Experiments in rights control : expression and enforcement , 2005 .

[114]  Erika Ábrahám,et al.  An Assertional Proof System for Multithreaded Java - Theory and Tool Support , 2005 .

[115]  K. Leeuw Cryptology and statecraft in the Dutch Republic , 2000 .

[116]  Rajeev Alur,et al.  Model-Checking in Dense Real-time , 1993, Inf. Comput..

[117]  Marieke Huisman,et al.  Reasoning about Java programs in higher order logic using PVS and Isabelle , 2001 .

[118]  Thomas A. Henzinger,et al.  Software Verification with BLAST , 2003, SPIN.

[119]  Eelco Dolstra,et al.  The purely functional software deployment model , 2006 .

[120]  M.H.G. Kesseler,et al.  The implementation of functional languages on parallel machines with distributed memory , 1996 .

[121]  Matthew B. Dwyer,et al.  Building Your Own Software Model Checker Using the Bogor Extensible Model Checking Framework , 2005, CAV.

[122]  Jan A. Bergstra,et al.  Discrete time process algebra , 1992, Formal Aspects of Computing.

[123]  RJ Roy Willemen,et al.  School timetable construction : algorithms and complexity , 2002 .

[124]  Ansgar Fehnker,et al.  Citius, Vilius, Melius : guiding and cost-optimality in model checking of timed and hybrid systems , 2002 .

[125]  Manfred Broy,et al.  Model-Based Testing of Reactive Systems, Advanced Lectures , 2005 .

[126]  Sergio Yovine,et al.  KRONOS: a verification tool for real-time systems , 1997, International Journal on Software Tools for Technology Transfer.

[127]  P. H. Starke,et al.  Reachability analysis of Petri nets using symmetries , 1991 .

[128]  Judi Maria Tirza Romijn,et al.  Analysing Industrial Protocols with Formal Methods , 1999 .

[129]  Gerd Behrmann,et al.  Distributed reachability analysis in timed automata , 2005, International Journal on Software Tools for Technology Transfer.

[130]  Zhiming Wu,et al.  Deadlock avoidance control synthesis in manufacturing systems using model checking , 2003, Proceedings of the 2003 American Control Conference, 2003..

[131]  R Rene Schiefer,et al.  Viper : a visualisation tool for parallel program construction , 1999 .

[132]  Farn Wang Efficient Verification of Timed Automata with BDD-Like Data-Structures , 2003, VMCAI.

[133]  Jelasity Márk,et al.  The shape of evolutionary search: discovering and representingsearch space structure , 2001 .

[134]  Michel A. Reniers,et al.  Hybrid process algebra , 2005, J. Log. Algebraic Methods Program..

[135]  Erik P. de Vink,et al.  Verification and Improvement of the Sliding Window Protocol , 2003, TACAS.

[136]  A. G. Engels,et al.  Languages for analysis and testing of event sequences , 2001 .

[137]  Martijn Hendriks,et al.  Model Checking the Time to Reach Agreement , 2005, FORMATS.

[138]  R. S. Venema,et al.  Aspects of an integrated neural prediction system , 1999 .

[139]  Hui Gao,et al.  Design and verification of lock-free parallel algorithms , 2005 .

[140]  S. P. Luttik Choice quantification in process algebra , 2002 .

[141]  J. Verriet Scheduling with communication for multiprocessor computation , 1998 .

[142]  Ad M. G. Peeters,et al.  An asynchronous low-power 80C51 microcontroller , 1998, Proceedings Fourth International Symposium on Advanced Research in Asynchronous Circuits and Systems.

[143]  Karen Yorav,et al.  Exploiting syntactic structure for automatic verification , 2000 .

[144]  Nancy A. Lynch,et al.  Bounds on the time to reach agreement in the presence of timing uncertainty , 1991, STOC '91.

[145]  William Stallings,et al.  Operating Systems: Internals and Design Principles , 1991 .

[146]  Randal E. Bryant,et al.  Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.

[147]  EO Esko Dijk Indoor ultrasonic position estimation using a single base station , 2004 .

[148]  Jarno Guidi,et al.  Enhancing Discovery with Liveness , 2004 .

[149]  Frits W. Vaandrager,et al.  Control Synthesis for a Smart Card Personalization System Using Symbolic Model Checking , 2003, FORMATS.

[150]  Joost-Pieter Katoen,et al.  Are you still there? - A lightweight algorithm to monitor node presence in self-configuring networks , 2005, 2005 International Conference on Dependable Systems and Networks (DSN'05).

[151]  Amir Pnueli,et al.  Liveness and Acceleration in Parameterized Verification , 2000, CAV.

[152]  Kim G. Larsen,et al.  Static Guard Analysis in Timed Automata Verification , 2003, TACAS.

[153]  Isabelle Reymen Improving design processes through structured reflection : case studies , 2001 .

[154]  Theodorus Cornelis Ruys,et al.  Towards effective model checking , 2001 .

[155]  T. Kuipers,et al.  Techniques for understanding legacy software systems , 2002 .

[156]  Gerd Behrmann,et al.  Scheduling Lacquer Production by Reachability Analysis -- A Case Study , 2005 .

[157]  Parosh Aziz Abdulla,et al.  Handling Global Conditions in Parameterized System Verification , 1999, CAV.

[158]  Maria Eva Magdalena Lijding,et al.  Real-Time Scheduling of Tertiary Storage , 2003 .

[159]  M. A. Valero Espada,et al.  Modal Abstraction and Replication of Processes with Data , 2005 .

[160]  M. Oostdijk Generation and presentation of formal mathematical documents , 2001 .

[161]  Bastiaan Heeren,et al.  Top quality type error Messages , 2005 .

[162]  ter Hugo Wilfried Laurenz Doest Towards Probabilistic Unification-Based Parsing , 1999 .

[163]  Henning Dierks,et al.  Specification and verification of polling real time systems , 1999, Ausgezeichnete Informatikdissertationen.

[164]  Spyros Reveliotis,et al.  Deadlock Avoidance for Sequential Resource Allocation Systems: Hard and Easy Cases , 2001 .

[165]  Ad M. G. Peeters,et al.  Single-rail handshake circuits , 1995, Proceedings Second Working Conference on Asynchronous Design Methodologies.

[166]  Tac Tim Willemse Semantics and verification in process algebras with data and timing , 2003 .

[167]  Emilia I. Barakova,et al.  Learning reliability : a study on dindecisiveness in sample selection , 1999 .

[168]  Ahmed Bouajjani,et al.  Symbolic Reachability Analysis of FIFO-Channel Systems with Nonregular Sets of Configurations , 1999, Theor. Comput. Sci..

[169]  David L. Dill,et al.  Efficient verification of symmetric concurrent systems , 1993, Proceedings of 1993 IEEE International Conference on Computer Design ICCD'93.

[170]  Oded Maler,et al.  Job-Shop Scheduling Using Timed Automata , 2001, CAV.

[171]  Jeroen Eggermont,et al.  Data Mining using Genetic Programming : Classification and Symbolic Regression , 2005 .

[172]  M. Niqui,et al.  Formalising Exact Arithmetic. Representations, Algorithms and Proofs , 2004 .

[173]  Edsger W. Dijkstra,et al.  Cooperating sequential processes , 2002 .

[174]  Placid Mathew Ferreira,et al.  Design Guidelines for Deadlock-Handling Strategies in Flexible Manufacturing Systems , 1997 .

[175]  Y Yuechen Qian,et al.  Data synchronization and browsing for home environments , 2004 .

[176]  Michel A. Reniers,et al.  Message sequence chart : syntax and semantics , 1999 .

[177]  Lars Michael Kristensen,et al.  A Sweep-Line Method for State Space Exploration , 2001, TACAS.

[178]  M. B. van der Zwaag,et al.  Models and logics for process algebra , 2002 .

[179]  Conrado Daws,et al.  Reducing the number of clock variables of timed automata , 1996, RTSS.

[180]  Gerard J. Holzmann,et al.  The SPIN Model Checker , 2003 .

[181]  Joseph Sifakis,et al.  Building models of real-time systems from application software , 2003, Proc. IEEE.

[182]  H.M.A. van Beek,et al.  Specification and analysis of Internet applications , 2005 .

[183]  J.J.H. Fey,et al.  Design of a fruit juice blending and packaging plant , 2000 .

[184]  Olga Tveretina,et al.  A Decision Procedure for Equality Logic with Uninterpreted Functions , 2004, AISC.

[185]  M. de Jonge,et al.  To reuse or to be reused. Techniques for component composition and construction , 2003 .

[186]  Martín Abadi,et al.  An old-fashioned recipe for real time , 1994, TOPL.

[187]  Seif Haridi,et al.  Distributed Algorithms , 1992, Lecture Notes in Computer Science.

[188]  Daan Leijen,et al.  The λ Abroad - A Functional Approach to Software Components , 2003 .

[189]  P. Zoeteweij,et al.  Composing constraint solvers , 2005 .

[190]  Patrice Godefroid,et al.  Symbolic Verification of Communication Protocols with Infinite State Spaces using QDDs , 1999, Formal Methods Syst. Des..

[191]  Ansgar Fehnker,et al.  Scheduling a steel plant with timed automata , 1999, Proceedings Sixth International Conference on Real-Time Computing Systems and Applications. RTCSA'99 (Cat. No.PR00306).

[192]  Mark Lawley,et al.  Polynomial-complexity deadlock avoidance policies for sequential resource allocation systems , 1997, IEEE Trans. Autom. Control..

[193]  Pedro R. D'Argenio,et al.  Algebras and Automata for Timed and Stochastic Systems , 1999 .

[194]  G. Rozenberg,et al.  Effective models for the structure of ð-calculus processes with replication , 2001 .

[195]  Willem Otto David Griffioen,et al.  Studies in computer aided verification of protocols , 2000 .

[196]  Lawrence Charles Paulson,et al.  Isabelle/HOL: A Proof Assistant for Higher-Order Logic , 2002 .

[197]  Jurgen Vinju,et al.  Analysis and transformation of source code by parsing and rewriting , 2005 .

[198]  van Robert Liere,et al.  Studies in Interactive Visualization , 2001 .