Thermal test vehicle for the validation of thermal modelling of hot spot dissipation in 3D stacked ICs
暂无分享,去创建一个
E. Beyne | V. Cherman | M. Stucchi | B. Vandevelde | H. Oprins | E. Beyne | M. Stucchi | V. Cherman | B. Vandevelde | H. Oprins | C. Torregiani | C. Torregiani
[1] Bart Vandevelde,et al. Fine grain thermal modeling and experimental validation of 3D-ICs , 2011, Microelectron. J..
[2] M. Rencz,et al. Structure function evaluation of stacked dies , 2004, Twentieth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (IEEE Cat. No.04CH37545).
[3] E. Beyne,et al. The rise of the 3rd dimension for system intergration , 2006, 2006 International Interconnect Technology Conference.
[4] E. Beyne,et al. Thermal analysis of hot spots in advanced 3D-stacked structures , 2009, 2009 15th International Workshop on Thermal Investigations of ICs and Systems.
[5] M. Turowski,et al. Multiscale 3D thermal analysis of analog ICs: From full-chip to device level , 2008, 2008 14th International Workshop on Thermal Inveatigation of ICs and Systems.
[6] L. Zhang,et al. Thermal characterization of stacked-die packages , 2004, Twentieth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (IEEE Cat. No.04CH37545).
[7] G. Van der Plas,et al. Fine grain thermal modeling of 3D stacked structures , 2009, 2009 15th International Workshop on Thermal Investigations of ICs and Systems.
[8] Jason Cong,et al. A thermal-driven floorplanning algorithm for 3D ICs , 2004, ICCAD 2004.
[9] E. Beyne,et al. 3D integration by Cu-Cu thermo-compression bonding of extremely thinned bulk-Si die containing 10 μm pitch through-Si vias , 2006, 2006 International Electron Devices Meeting.
[10] E.A. Garcia,et al. Compact modeling approaches to multiple die stacked chip scale packages [thermal modeling] , 2003, Ninteenth Annual IEEE Semiconductor Thermal Measurement and Management Symposium, 2003..
[11] Sachin S. Sapatnekar,et al. Addressing thermal and power delivery bottlenecks in 3D circuits , 2009, 2009 Asia and South Pacific Design Automation Conference.
[12] Bart Vandevelde,et al. Compact thermal modeling of hot spots in advanced 3D-stacked structures , 2009, EPTC 2009.