The recent resurgence of interest in Wafer Scale Integration (WSI) is driven by a requirement for dense multilayer interconnect at wiring capacities far in excess of that which is achievable in ceramic hybrid packages. All of the problems associated with achieving satisfactory yield in such structures must now be reexamined to see whether the current technology is capable of achieving what has proven so elusive in the past. One of the relevant technologies is direct write electron beam lithography. Initially. efforts are being directed at fabricating wire at rather large dimensions (5-10 pm) with similar wire separations. At these dimensions. good clean room practices should be adequate to fabricate about 20-70 meters of fault-free wire on 97% of the wafers. However. longer wire lengths encounter some defects with higher probability. The IBM EL-2 electron beam lithography system available at the Rensselaer Center for Integrated Electronics is capable of achieving discretionary wafer wide wire patterning because it can be used in direct write to wafer mode with excellent registration and low stitching error. The availability of this tool eliminates the cost of plate making and permits the use of adaptive wafer wire rework for repair. In this paper we examine some of the strategies and technical issues associated with E-Beam patterning of wafer length interconnections.