The Evolution of RISC Technology at IBM

This paper traces the evolution of IBM RISC architecture from its origins in the 1970s at the IBM Thomas J. Watson Research Center to the present-day IBM RISC System/6000* computer. The acronym RISC, for Reduced Instruction-Set Computer, is used in this paper to describe the 801 and subsequent architectures. However, RISC in this context does not strictly imply a reduced number of instructions, but rather a set of primitives carefully chosen to exploit the fastest component of the storage hierarchy and provide instructions that can be generated easily by compilers. We describe how these goals were embodied in the 801 architecture and how they have since evolved on the basis of experience and new technologies. The effect of this evolution is illustrated with the results of several benchmark tests of CPU performance.

[1]  Gregory F. Grohoski,et al.  Machine Organization of the IBM RISC System/6000 Processor , 1990, IBM J. Res. Dev..

[2]  Erdem Hokenek,et al.  Design of the IBM RISC System/6000 Floating-Point Execution Unit , 1990, IBM J. Res. Dev..

[3]  John Cocke,et al.  A methodology for the real world , 1981 .

[4]  P. Wallich.  Toward simpler, faster computers: By omitting unnecessary functions, designers of reduced-instruction-set computers increase system speed and hold down equipment costs , 1985, IEEE Spectrum.

[5]  John Cocke,et al.  Optimization of range checking , 1982, SIGPLAN '82.

[6]  Abraham Peled.  John Cocke: The 1987 ACM A.M. Turing Award recipient , 1988, CACM.

[7]  George Radin.  The 801 Minicomputer , 1983, IBM J. Res. Dev..

[8]  Ansi Ieee,et al.  IEEE Standard for Binary Floating Point Arithmetic , 1985 .

[9]  Peter W. Markstein.  Computation of Elementary Functions on the IBM RISC System/6000 Processors , 1990, IBM J. Res. Dev..

[10]  Henry S. Warren,et al.  Instruction Scheduling for the IBM RISC System/6000 Processor , 1990, IBM J. Res. Dev..

[11]  Martin Hopkins,et al.  An overview of the PL.8 compiler , 1982, SIGPLAN '82.

[12]  David R. Ditzel,et al.  Branch folding in the CRISP microprocessor: reducing branch delay to zero , 1987, ISCA '87.

[13]  Martin Charles Golumbic,et al.  Instruction Scheduling Beyond Basic Blocks , 1990, IBM J. Res. Dev..

[14]  Des Watson.  High-level languages and their compilers , 1989, International computer science series.

[15]  Jacob T. Schwartz,et al.  On programming : an interim report on the SETL Project , 1973 .