Device and circuit-level analog performance trade-offs: a comparative study of planar bulk FETs versus FinFETs
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P. Wambacq | B. Parvais | A. Mercha | S. Decoutere | S. Donnay | N. Collaert | J. Borremans | D. Linten | M. Dehan | F.N. Cubaynes | W. Sansen | S. Kubicek | M. Jurczak | V. Subramanian | J. Loo | R.J.P. Lander | J.C. Hooker | G. Groeseneken | N. Collaert | M. Jurczak | D. Linten | B. Parvais | W. Sansen | A. Mercha | S. Decoutere | S. Donnay | S. Kubicek | P. Wambacq | G. Groeseneken | J. Borremans | V. Subramanian | R. Lander | M. Dehan | F. Cubaynes | J. Loo | J. Hooker
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