A High-Linearity Capacitance-to-Digital Converter Suppressing Charge Errors From Bottom-Plate Switches

A high-precision capacitance-to-digital converter (CDC) that is configurable to interface with unipolar or push-pull-type capacitive sensors is presented in this paper. In the conventional switched-capacitor CDC, it is well known that clock feedthroughs and charge injections from top-plate switches can be eliminated by a bottom-plate sampling scheme. However, those charge errors from the bottom-plate switches depend on the digital output and the varying value of the sensing capacitor itself. They will thus affect the overall CDC linearity. When the varying range of the sensing capacitor is wide, the nonlinearity becomes more pronounced. This paper proposes new switching and calibration schemes to reduce these non-idealities. A prototype of a second order CDC employing the proposed techniques in a 0.18 μm CMOS process achieves a 53.2 aF RMS resolution with a 1 ms conversion time. The proposed calibration technique improves the linearity of the CDC from 9.3 bits to 12.3 bits and from 10.1 bits to 13.3 bits in the unipolar and push-pull-type sensing modes, respectively, with a sensing capacitance varying from 0.5 to 3.5 pF. The CDC is also demonstrated with a real-life pressure sensor.

[1]  Suhwan Kim,et al.  A Delta–Sigma Interface Circuit for Capacitive Sensors With an Automatically Calibrated Zero Point , 2011, IEEE Transactions on Circuits and Systems II: Express Briefs.

[2]  Bo Wang,et al.  High-accuracy circuits for on-chip capacitive ratio testing and sensor readout , 1998, IEEE Trans. Instrum. Meas..

[3]  Georges G. E. Gielen,et al.  A fully-digital, 0.3V, 270 nW capacitive sensor interface without external references , 2011, 2011 Proceedings of the ESSCIRC (ESSCIRC).

[4]  Kofi A. A. Makinwa,et al.  A capacitance-to-digital converter for displacement sensing with 17b resolution and 20μs conversion time , 2012, 2012 IEEE International Solid-State Circuits Conference.

[5]  Gabor C. Temes,et al.  Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization , 1996, Proc. IEEE.

[6]  Franziska Hoffmann,et al.  Design Of Analog Cmos Integrated Circuits , 2016 .

[7]  Larry K. Baxter,et al.  Capacitive Sensors: Design and Applications , 1996 .

[8]  B. Bahreyni,et al.  A sensitive interface circuit with wide dynamic range for capacitive sensors , 2012, 2012 IEEE Sensors.

[9]  Gerard C. M. Meijer,et al.  An Energy-Efficient 15-Bit Capacitive-Sensor Interface Based on Period Modulation , 2012, IEEE Journal of Solid-State Circuits.

[10]  Kenneth W. Martin,et al.  Analog integrated circuit design. 2nd ed. , 2012 .

[11]  Boby George,et al.  Analysis of the Switched-Capacitor Dual-Slope Capacitance-to-Digital Converter , 2010, IEEE Transactions on Instrumentation and Measurement.

[12]  A. Bakker,et al.  A CMOS nested-chopper instrumentation amplifier with 100-nV offset , 2000, IEEE Journal of Solid-State Circuits.

[13]  Paolo Bruschi,et al.  A Low-Power Interface for Capacitive Sensors With PWM Output and Intrinsic Low Pass Characteristic , 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

[14]  Youngcheol Chae,et al.  A 1.2V 8.3nJ energy-efficient CMOS humidity sensor for RFID applications , 2012, 2012 Symposium on VLSI Circuits (VLSIC).

[15]  Johan H. Huijsing,et al.  Precision Temperature Sensors in CMOS Technology , 2006 .

[16]  Stavros Chatzandroulis,et al.  A Reconfigurable Multichannel Capacitive Sensor Array Interface , 2011, IEEE Transactions on Instrumentation and Measurement.