Prophet/critic hybrid branch prediction
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Mateo Valero | Jared Stark | Ayose Falcón | Alex Ramírez | Konrad Lai | M. Valero | K. Lai | Alex Ramírez | Jared Stark | A. Falcón
[1] Daniel A. Jiménez,et al. The impact of delay on the design of branch predictors , 2000, MICRO 33.
[2] Eric Rotenberg,et al. Assigning confidence to conditional branch predictions , 1996, Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture. MICRO 29.
[3] Yale N. Patt,et al. The effect of speculatively updating branch history on branch prediction accuracy, revisited , 1994, MICRO 27.
[4] Daniel A. Jiménez,et al. Reconsidering complex branch predictors , 2003, The Ninth International Symposium on High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings..
[5] Yale N. Patt,et al. Improving branch prediction accuracy by reducing pattern history table interference , 1996, Proceedings of the 1996 Conference on Parallel Architectures and Compilation Technique.
[6] Dana S. Henry,et al. Predicting conditional branches with fusion-based hybrid predictors , 2002, Proceedings.International Conference on Parallel Architectures and Compilation Techniques.
[7] Y.N. Patt,et al. Using Hybrid Branch Predictors to Improve Branch Prediction Accuracy in the Presence of Context Switches , 1996, 23rd Annual International Symposium on Computer Architecture (ISCA'96).
[8] Dirk Grunwald,et al. Confidence estimation for speculation control , 1998, ISCA.
[9] Daniel A. Jiménez,et al. Neural methods for dynamic branch prediction , 2002, TOCS.
[10] Lucian N. Vintan,et al. Towards a high performance neural branch predictor , 1999, IJCNN'99. International Joint Conference on Neural Networks. Proceedings (Cat. No.99CH36339).
[11] Yale N. Patt,et al. An analysis of correlation and predictability: what makes two-level branch predictors work , 1998, ISCA.
[12] Trevor N. Mudge,et al. The YAGS branch prediction scheme , 1998, Proceedings. 31st Annual ACM/IEEE International Symposium on Microarchitecture.
[13] Tse-Yu Yeh,et al. Understanding branches and designing branch predictors for high-performance microprocessors , 2001, Proc. IEEE.
[14] Daniel A. Jiménez,et al. Fast Path-Based Neural Branch Prediction , 2003, MICRO.
[15] André Seznec,et al. Effective ahead pipelining of instruction block address generation , 2003, ISCA '03.
[16] Trevor Mudge,et al. The role of adaptivity in two-level adaptive branch prediction , 1995, MICRO 1995.
[17] S. McFarling. Combining Branch Predictors , 1993 .
[18] Pierre Michaud,et al. A Comprehensive Study of Dynamic Global History Branch Prediction , 2001 .
[19] Mateo Valero,et al. Fetching instruction streams , 2002, 35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings..
[20] Yale N. Patt,et al. The effects of mispredicted-path execution on branch prediction structures , 1996, Proceedings of the 1996 Conference on Parallel Architectures and Compilation Technique.
[21] Yale N. Patt,et al. Alternative implementations of hybrid branch predictors , 1995, Proceedings of the 28th Annual International Symposium on Microarchitecture.
[22] Yale N. Patt,et al. Variable length path branch prediction , 1998, ASPLOS VIII.
[23] Pierre Michaud,et al. De-aliased Hybrid Branch Predictors , 1999 .
[24] Haitham Akkary,et al. Checkpoint Processing and Recovery: Towards Scalable Large Instruction Window Processors , 2003, MICRO.
[25] Trevor N. Mudge,et al. Analysis of branch prediction via data compression , 1996, ASPLOS VII.
[26] James E. Smith. Keynote: Is there anything more to learn about high performance processors? , 2003, ICS '03.
[27] Eric Sprangle,et al. Increasing processor performance by implementing deeper pipelines , 2002, ISCA.
[28] Glenn Reinman,et al. A scalable front-end architecture for fast instruction delivery , 1999, ISCA.
[29] Juan J. Navarro,et al. Dynamic history-length fitting: a third level of adaptivity for branch prediction , 1998, ISCA.
[30] Yiannakis Sazeides,et al. Design tradeoffs for the Alpha EV8 conditional branch predictor , 2002, ISCA.
[31] Yale N. Patt,et al. An effective programmable prefetch engine for on-chip caches , 1995, MICRO 1995.