26.5 An 8-to-16Gb/s 0.65-to-1.05pJ/b 2-tap impedance-modulated voltage-mode transmitter with fast power-state transitioning in 65nm CMOS

Future processor I/Os must aggressively improve per-channel data-rates and energy efficiency to meet projected system bandwidth demands. These constraints necessitate the design of ultra-low-power serial-link transmitters that can efficiently incorporate equalization to compensate for channel losses, while enabling fast power-state transitioning to leverage dynamic power scaling. In this work, a scalable-data-rate voltage-mode transmitter is presented that introduces two main innovations. First, an impedance-modulated 2-tap equalizer is adopted that employs analog control of the equalizer taps, thereby obviating output driver segmentation. Second, fast power-state transitioning is achieved using a replica-biased voltage regulator to power the output stages of multiple channels and per-channel injection-locked oscillators (ILO) that can be rapidly disabled. Furthermore, capacitively driven low-swing global clock distribution and automatic phase calibration of the local ILO-generated quarter-rate clocks enables improved energy efficiency with aggressive supply scaling.