Predicting execution time on contemporary computer architectures

Predicting the execution times of straight-line code sequences is a fundamental problem in the design and analysis of hard-real-time systems. A survey of the hardware and software factors that make predicting execution time difficult is presented, along with the results of experiments that evaluate the degree of variation in execution time that may be caused by these factors. The traditional methods of measuring and predicting execution time are examined, and their strengths and weaknesses discussed. A new technique is presented for predicting point-to-point execution times on contemporary microprocessors. This technique, is called Micro-analysis. It uses a machine description, which is in the form of a set of translation rules similar to those that have proven useful for code generation and peephole optimization, to translate compiled object code into a sequence of very low level instructions. The stream of micro-instructions is then analyzed for timing, via a three-level pattern matching scheme. At this low level, the effects of advanced features such as caching and instruction overlap can be taken into account. The technique is compiler and language-independent, and easily retargetable. We have implemented a software timing prediction tool based on Micro-analysis, as well as a hybrid timing measurement tool using a programmable HP 1650A logic analyzer and a Sun workstation. Using these tools, we have compared the performance of the Micro-analysis technique against several traditional methods. We have also tested the retargetability of the Micro-analysis tool. The implementations of the tools, the retargeting effort, the experiments performed, and the results of the experiments are reported.