A CMOS voltage reference without resistors for ultra-low power applications

A MOSFET-only reference is fabricated in 0.18 mum CMOS technology. It uses stacked transistors biased in weak inversion to shift the produced negative temperature coefficient to relax the requirement for the weighting gain. The temperature dependence and the supply sensitivity of the output are 127 ppm/degC and 6 mV/V, respectively. The chip occupies 0.004 mm2 and consumes less than 40 nW at 0.7 V supply.

[1]  H. Oguey,et al.  CMOS Current Reference without Resistance , 1996, ESSCIRC '96: Proceedings of the 22nd European Solid-State Circuits Conference.

[2]  K. Sakui,et al.  A CMOS bandgap reference circuit with sub-1-V operation , 1999 .

[3]  T. R. Viswanathan,et al.  A CMOS bandgap reference without resistors , 2000, 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056).

[4]  G. Palumbo,et al.  A low-voltage low-power voltage reference based on subthreshold MOSFETs , 2003, IEEE J. Solid State Circuits.

[5]  Carlos Galup-Montoro,et al.  A 2-nW 1.1-V self-biased current reference in CMOS technology , 2005, IEEE Transactions on Circuits and Systems II: Express Briefs.

[6]  G. Iannaccone,et al.  A 300 nW, 12 ppm//spl deg/C Voltage Reference in a Digital 0.35 /spl mu/m CMOS Process , 2006, 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers..