Reducing the Hardware Complexity and Processing Time of Optical Parallel Interference Cancellation

Summary The successful of parallel interference cancellation (PIC) to reduce the multiple access interference in wireless CDMA communication systems has motivated the communication community to investigate the potential of PIC in the optical CDMA domain. However, the drawback of PIC in optical domain is the increase in demand for hardware in each receiver. As a result, it requires more complex hardware, higher processing time and cost. The hardware complexity increases in the receiver side of Optical PIC (OPIC) when the number of transmitter (users) increases which may require the upgrade of the entire system. To overcome the mentioned problem, a new technique is proposed which is based mainly on the conventional OPIC referred as One Stage OPIC (OS-OPIC).Optical Orthogonal Code (OOC) is adopted as signature sequence for the performance analysis and new expression for the error probability is derived. The results show that the proposed method is effective to reduce the hardware complexity, processing time and cost while maintaining the same bit error probability at the cost of increasing the threshold value.