Qualitative Analysis of 2-bit CMOS Magnitude Comparator and GDI Magnitude Comparator using FinFET Technology (18nm)
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[1] Tsu-Jae King,et al. FinFETs for nanoscale CMOS digital integrated circuits , 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..
[2] Lucky Agarwal,et al. Short channel effects (SCEs) characterization of underlaped dual-K spacer in dual-metal gate FinFET device , 2016, 2016 International Conference on Control, Computing, Communication and Materials (ICCCCM).
[3] David Harris,et al. CMOS VLSI Design: A Circuits and Systems Perspective , 2004 .
[4] Michael J. Schulte,et al. A combined two's complement and floating-point comparator , 2005, 2005 IEEE International Symposium on Circuits and Systems.
[5] Steve Furber,et al. ARM System Architecture , 1996 .
[6] Israel A. Wagner,et al. Gate-diffusion input (GDI): a power-efficient method for digital combinatorial circuits , 2002, IEEE Trans. Very Large Scale Integr. Syst..
[7] Mohamed Rafiquzzaman,et al. Introduction to Digital Systems , 2005 .
[8] Michael Loong Peng Tan,et al. Design and implementation of a 1-bit FinFET Full Adder cell for ALU in subthreshold region , 2014, 2014 IEEE International Conference on Semiconductor Electronics (ICSE2014).