Survey of reconfigurable architectures for multimedia applications
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F. Tobajas | V. de Armas | R. Sarmiento | T. Cervero | S. López | G. M. Callicó | J. López
[1] Michael J. Schulte,et al. An Overview of Reconfigurable Hardware in Embedded Systems , 2006, EURASIP J. Embed. Syst..
[2] Rudy Lauwereins,et al. Architecture exploration for a reconfigurable architecture template , 2005, IEEE Design & Test of Computers.
[3] Shahram Shirani,et al. Run-Time Reconfigurable Systems for Digital Signal Processing Applications: A Survey , 2005, J. VLSI Signal Process..
[4] Takashi Nishimura,et al. Implementation of Dynamically Reconfigurable Processor MuCCRA , 2007 .
[5] Neil W. Bergmann,et al. QUKU: a two-level reconfigurable architecture , 2006, IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures (ISVLSI'06).
[6] Reiner W. Hartenstein,et al. A decade of reconfigurable computing: a visionary retrospective , 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.
[7] Roberto Guerrieri,et al. A XiRisc-based SoC for embedded DSP applications , 2004, Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571).
[8] Marco Lanuzza,et al. MORA: A New Coarse-Grain Reconfigurable Array for High Throughput Multimedia Processing , 2007, SAMOS.
[9] Jürgen Becker,et al. A Parallel Dynamically Reconfigurable Architecture Designed for Flexible Application-Tailored Hardware/Software Systems in Future Mobile Communication , 2004, The Journal of Supercomputing.
[10] Scott Hauck,et al. The roles of FPGAs in reprogrammable systems , 1998, Proc. IEEE.
[11] Henry Hoffmann,et al. Evaluation of the Raw microprocessor: an exposed-wire-delay architecture for ILP and streams , 2004, Proceedings. 31st Annual International Symposium on Computer Architecture, 2004..
[12] Paul L. Master. Reconfigurable Hardware and Software Architectural Constructs for the Enablement of Resilient Computing Systems , 2006, IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06).
[13] André DeHon,et al. MATRIX: a reconfigurable computing architecture with configurable instruction distribution and deployable resources , 1996, 1996 Proceedings IEEE Symposium on FPGAs for Custom Computing Machines.
[14] Olivier Sentieys,et al. DART: a dynamically reconfigurable architecture dealing with future mobile telecommunications constr , 2002, Proceedings 16th International Parallel and Distributed Processing Symposium.
[15] Guangming Lu,et al. MorphoSys: a reconfigurable architecture for multimedia applications , 1998, Proceedings. XI Brazilian Symposium on Integrated Circuit Design (Cat. No.98EX216).
[16] Nader Bagherzadeh,et al. A fast parallel Reed-Solomon decoder on a reconfigurable architecture , 2003, First IEEE/ACM/IFIP International Conference on Hardware/ Software Codesign and Systems Synthesis (IEEE Cat. No.03TH8721).
[17] Nader Bagherzadeh,et al. Design and analysis of a programmable single-chip architecture for DVB-T base-band receiver , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.
[18] Poras T. Balsara,et al. Reconfigurable array media processor (RAMP) , 2000, Proceedings 2000 IEEE Symposium on Field-Programmable Custom Computing Machines (Cat. No.PR00871).
[19] Bertil Svensson,et al. Evolution in architectures and programming methodologies of coarse-grained reconfigurable computing , 2009, Microprocess. Microsystems.
[20] Gerard J. M. Smit,et al. A Flexible and Energy-Efficient Coarse-Grained Reconfigurable Architecture for Mobile Systems , 2003, The Journal of Supercomputing.
[21] S. D. Haynes,et al. UltraSONIC: A Reconfigurable Architecture for Video Image Processing , 2002, FPL.
[22] Martin Margala,et al. A New Reconfigurable Coarse-Grain Architecture for Multimedia Applications , 2007, Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007).
[23] Carl Ebeling,et al. Mapping applications to the RaPiD configurable architecture , 1997, Proceedings. The 5th Annual IEEE Symposium on Field-Programmable Custom Computing Machines Cat. No.97TB100186).
[24] Rolf Ernst,et al. A High-End Real-Time Digital Film Processing Reconfigurable Platform , 2007, EURASIP J. Embed. Syst..
[25] Wayne Luk,et al. Reconfigurable computing: architectures and design methods , 2005 .
[26] Roberto Guerrieri,et al. Design and implementation of a reconfigurable heterogeneous multiprocessor SoC , 2006, IEEE Custom Integrated Circuits Conference 2006.
[27] Chul Kim,et al. 3D-SoftChip: A Novel Architecture for Next-Generation Adaptive Computing Systems , 2006, EURASIP J. Adv. Signal Process..
[28] Russell Tessier,et al. c ○ 2001 Kluwer Academic Publishers. Manufactured in The Netherlands. Reconfigurable Computing for Digital Signal Processing: A Survey ∗ , 1999 .
[29] Olivier Sentieys,et al. DART: A Functional-Level Reconfigurable Architecture for High Energy Efficiency , 2008, EURASIP J. Embed. Syst..
[30] Markus Weinhardt,et al. PACT XPP—A Self-Reconfigurable Data Processing Architecture , 2003, The Journal of Supercomputing.
[31] Seth Copen Goldstein,et al. Pipeline Reconfigurable FPGAs , 2000, J. VLSI Signal Process..
[32] André B. J. Kokkeler,et al. The Chameleon Architecture for Streaming DSP Applications , 2007, EURASIP J. Embed. Syst..
[33] Bjorn De Sutter,et al. Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder , 2008, J. Signal Process. Syst..
[34] Li Jing,et al. High-Level Synthesis Challenges and Solutions for a Dynamically Reconfigurable Processor , 2006, 2006 IEEE/ACM International Conference on Computer Aided Design.
[35] Stamatis Vassiliadis,et al. The MOLEN polymorphic processor , 2004, IEEE Transactions on Computers.
[36] Nader Bagherzadeh,et al. A Reconfigurable Architecture for Wireless Communication Systems , 2006, Third International Conference on Information Technology: New Generations (ITNG'06).
[37] Scott Hauck,et al. Reconfigurable computing: a survey of systems and software , 2002, CSUR.
[38] Claudio Mucci,et al. Run-Time Reconfigurable Processors , 2007 .
[39] Luciano Lavagno,et al. Software development for high-performance, reconfigurable, embedded multimedia systems , 2005, IEEE Design & Test of Computers.
[40] Jari Nurmi,et al. A coarse-grain reconfigurable architecture for multimedia applications featuring subword computation capabilities , 2008, Journal of Real-Time Image Processing.
[41] Wayne Luk,et al. Video Image Processing with the Sonic Architecture , 2000, Computer.