3D Integration Using Adhesive, Metal, and Metal/Adhesive as Wafer Bonding Interfaces

Three-dimensional (3D) integration is an emerging technology that vertically stacks and interconnects multiple materials, technologies and functional components to form highly integrated micro/nano-systems. This paper reviews the materials and technologies for three wafer bonding approaches to 3D integration using adhesive, metal, and metal/adhesive as the bonding interfaces. Similarities and differences in architectural advantages and technology challenges are presented, with recent research advances discussed.

[1]  Robert S. Patti,et al.  Three-Dimensional Integrated Circuits and the Future of System-on-Chip Designs , 2006, Proceedings of the IEEE.

[2]  R. Gutmann,et al.  Adhesive wafer bonding , 2006 .

[3]  Kuan-Neng Chen,et al.  Morphology and Bond Strength of Copper Wafer Bonding , 2004 .

[4]  Mitsumasa Koyanagi,et al.  Handbook of 3D Integration , 2008 .

[5]  J.-Q. Lu,et al.  Back-end compatibility of bonding and thinning processes for a wafer-level 3D interconnect technology platform , 2004, Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729).

[6]  Anna W. Topol,et al.  Electrical integrity of state-of-the-art 0.13 /spl mu/m SOI CMOS devices and circuits transferred for three-dimensional (3D) integrated circuit (IC) fabrication , 2002, Digest. International Electron Devices Meeting,.

[7]  J.-Q. Lu,et al.  Bonding interfaces in wafer-level metal/adhesive bonded 3D integration , 2008, 2008 58th Electronic Components and Technology Conference.

[8]  Peter Ramm,et al.  3D Integration of CMOS transistors with ICV-SLID technology , 2005 .

[9]  Jian-Qiang Lu,et al.  3-D Hyperintegration and Packaging Technologies for Micro-Nano Systems , 2009, Proceedings of the IEEE.

[10]  K. W. Lee,et al.  Three-dimensional shared memory fabricated using wafer stacking technology , 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

[11]  Russell P. Kraft,et al.  Stacked chip-to-chip interconnections using wafer bonding technology with dielectric bonding glues , 2001, Proceedings of the IEEE 2001 International Interconnect Technology Conference (Cat. No.01EX461).

[12]  Jian-Qiang Lu,et al.  CMP Compatibility of Partially Cured Benzocyclobutene (BCB) for a Via-First 3D IC Process , 2005 .

[13]  Jian-Qiang Lu,et al.  Critical Adhesion Energy of Benzocyclobutene-Bonded Wafers , 2006 .

[14]  Jian-Qiang Lu,et al.  3D Integration Based upon Dielectric Adhesive Bonding , 2008 .

[15]  C.K. Chen,et al.  A wafer-scale 3-D circuit integration technology , 2006, IEEE Transactions on Electron Devices.

[16]  Anna W. Topol,et al.  Structure, Design and Process Control for Cu Bonded Interconnects in 3D Integrated Circuits , 2006, 2006 International Electron Devices Meeting.

[17]  Jian-Qiang Lu,et al.  Wafer-Level Three-Dimensional Hyper-Integration Technology Using Dielectric Adhesive Wafer Bonding , 2005 .

[18]  J. McMahon,et al.  Via-First Inter-Wafer Vertical Interconnects utilizing Wafer-Bonding of Damascene-Patterned Metal/Adhesive Redistribution Layers , 2006 .

[19]  Kuan-Neng Chen,et al.  Microstructure evolution and abnormal grain growth during copper wafer bonding , 2002 .

[20]  R. Gutmann,et al.  Wafer Level 3-D ICs Process Technology , 2008 .

[21]  R. Augur,et al.  Evaluation procedures for wafer bonding and thinning of interconnect test structures for 3D ICs , 2003, Proceedings of the IEEE 2003 International Interconnect Technology Conference (Cat. No.03TH8695).

[22]  S. Ramanathan,et al.  Three-dimensional wafer stacking via Cu-Cu bonding integrated with 65-nm strained-Si/low-k CMOS technology , 2006, IEEE Electron Device Letters.

[23]  P. Andry,et al.  System-on-package (SOP) technology, characterization and applications , 2006, 56th Electronic Components and Technology Conference 2006.

[24]  J.-Q. Lu,et al.  Wafer bonding of damascene-patterned metal/adhesive redistribution layers for via-first three-dimensional (3D) interconnect , 2005, Proceedings Electronic Components and Technology, 2005. ECTC '05..