A Study of Parasitic Series Resistance Components in In–Ga–Zn–Oxide (a-IGZO) Thin-Film Transistors

We extracted the effective channel length and parasitic series resistance in a-IGZO inverted-staggered etch-stop (ES) TFTs. When there is an overlap between the drain or source electrode and the FET channel, the resistance of the channel underneath the overlapping regions is very low compared with other channel region resistance. As a result, the effective channel length is smaller than the physical length. The aforementioned definition of effective channel length in terms of device geometric parameters seems to be specific for ES a-IGZO TFTs.

[1]  Toshihisa Tsukada,et al.  Analysis of Effective Channel Length in Amorphous Silicon Thin-Film Transistors , 1992 .

[2]  D. Mountain,et al.  Application of electrical effective channel length and external resistance measurement techniques to a submicrometer CMOS process , 1989 .

[3]  Jae Kyeong Jeong,et al.  MOSFET-Like Behavior of a-InGaZnO Thin-Film Transistors With Plasma-Exposed Source–Drain Bulk Region , 2009, Journal of Display Technology.

[4]  R. Troutman,et al.  Modeling and parameter extraction of amorphous silicon thin-film-transistors for active-matrix liquid-crystal displays , 1990, International Technical Digest on Electron Devices.

[5]  R. F. Motta,et al.  A new method to determine MOSFET channel length , 1980, IEEE Electron Device Letters.

[6]  Hyun-Joong Chung,et al.  Bulk-Limited Current Conduction in Amorphous InGaZnO Thin Films , 2008 .

[7]  J.Y.-C. Sun,et al.  Geometry effects in MOSFET channel length extraction algorithms , 1985, IEEE Electron Device Letters.

[8]  J.Y.-C. Sun,et al.  On the accuracy of channel length characterization of LDD MOSFET's , 1986, IEEE Transactions on Electron Devices.

[9]  D. Widmann,et al.  Current crowding on metal contacts to planar devices , 1969 .

[10]  Peyman Servati,et al.  Above-threshold parameter extraction and modeling for amorphous silicon thin-film transistors , 2003 .

[11]  T. Kamiya,et al.  High-mobility thin-film transistor with amorphous InGaZnO4 channel fabricated by room temperature rf-magnetron sputtering , 2006 .

[12]  G.J. Hu,et al.  Gate-voltage-dependent effective channel length and series resistance of LDD MOSFET's , 1987, IEEE Transactions on Electron Devices.

[13]  Jang-Yeon Kwon,et al.  42.2: World's Largest (15‐inch) XGA AMLCD Panel Using IGZO Oxide TFT , 2008 .

[14]  Yeon-Gon Mo,et al.  High mobility bottom gate InGaZnO thin film transistors with SiOx etch stopper , 2007 .

[15]  Jae Kyeong Jeong,et al.  Comprehensive Study on the Transport Mechanism of Amorphous Indium-Gallium-Zinc Oxide Transistors , 2008 .

[16]  S. Laux,et al.  Accuracy of an effective channel length/External resistance extraction algorithm for MOSFET's , 1984, IEEE Transactions on Electron Devices.

[17]  K. Terada,et al.  A New Method to Determine Effective MOSFET Channel Length , 1979 .

[18]  Kee-Won Kwon,et al.  Source/Drain Series-Resistance Effects in Amorphous Gallium–Indium Zinc-Oxide Thin Film Transistors , 2008, IEEE Electron Device Letters.

[19]  Noriaki Ikeda,et al.  Application of amorphous oxide TFT to electrophoretic display , 2008 .

[20]  H. Ohta,et al.  Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors , 2004, Nature.