A Unified Approach to the design and Control of Dynamic Memory Networks

A dynamic memory is a storage medium constituted by an array of cells and an interconnection network between them. It is characterized by the constant circulation of the stored data. The objective is to design the interconnection network in order to have small access times and a simple memory control. Several interconnection schemes have been proposed in the literature. This paper presents a quite general model for such structures that greatly facilitates both the design and the control of the memory. Most previous proposals of dynamic memory interconnection networks are particular instances of our model. Moreover, our approach is used to obtain new proposals of interconnection topologies for dynamic memories and fast cyclic shift registers. Namely, a model that optimizes both the access time and the size of the memory and two memory organizations for sequential access are presented.

[1]  Miguel Ángel Fiol Mora,et al.  An optimal size network for dynamic memories , 1985 .

[2]  Harold S. Stone,et al.  Dynamic Memories with Enhanced Data Access , 1972, IEEE Transactions on Computers.

[3]  Jacques Lenfant.  Fast Random and Sequential Access to Dynamic Memories of Any Size , 1977, IEEE Transactions on Computers.

[4]  Abraham Lempel,et al.  On a Homomorphism of the de Bruijn Graph and its Applications to the Design of Feedback Shift Registers , 1970, IEEE Transactions on Computers.

[5]  D. Robinson.  A Course in the Theory of Groups , 1982 .

[6]  H. Stone.  Discrete Mathematical Structures and Their Applications , 1973 .

[7]  William F. Beausoleil,et al.  Shift register memory with multi-dimensional dynamic order , 1973 .

[8]  J. B. Sinclair,et al.  Comparison of dynamic-memory organizations: a tutorial , 1985 .

[9]  Josep Fàbrega Canudas.  Grafos y redes de interconexión: diseño, fiabilidad y encaminamiento , 1984 .

[10]  Solomon W. Golomb,et al.  Shift Register Sequences , 1981 .

[11]  B. Elspas,et al.  The Theory of Autonomous Linear Sequential Networks , 1959 .

[12]  Alfred V. Aho,et al.  Dynamic Memories with Rapid Random and Sequential Access , 1974, IEEE Transactions on Computers.

[13]  M.A. Fiol,et al.  The design and control of dynamic memory networks , 1988, 1988., IEEE International Symposium on Circuits and Systems.

[14]  S. Brent Morris,et al.  Processes for Random and Sequential Accessing in Dynamic Memories , 1979, IEEE Transactions on Computers.

[15]  Harold S. Stone.  Dynamic Memories with Fast Random and Sequential Access , 1975, IEEE Transactions on Computers.

[16]  Chak-Kuen Wong,et al.  Dynamic Memories with Faster Random and Sequential Access , 1977, IBM J. Res. Dev..

[17]  Miguel Angel Fiol,et al.  Line Digraph Iterations and the (d, k) Digraph Problem , 1984, IEEE Transactions on Computers.