The multiple variable order problem for binary decision diagrams: theory and practical application
暂无分享,去创建一个
[1] C. Y. Lee. Representation of switching circuits by binary-decision programs , 1959 .
[2] Sharad Malik,et al. Fast functional simulation using branching programs , 1995, ICCAD.
[3] Albert R. Wang,et al. Logic verification using binary decision diagrams in a logic synthesis environment , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.
[4] Bernard M. E. Moret,et al. Decision Trees and Diagrams , 1982, CSUR.
[5] Bernd Becker,et al. Solving the Multiple Variable Order Problem for Binary Decision Diagrams by Use of Dynamic Reordering Techniques , 1999 .
[6] Masahiro Fujita,et al. On variable ordering of binary decision diagrams for the application of multi-level logic synthesis , 1991, Proceedings of the European Conference on Design Automation..
[7] G. Cabodi,et al. Improved reachability analysis of large finite state machines , 1996, ICCAD 1996.
[8] Shuzo Yajima,et al. The Complexity of the Optimal Variable Ordering Problems of Shared Binary Decision Diagrams , 1993, ISAAC.
[9] R. Rudell. Dynamic variable ordering for ordered binary decision diagrams , 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).
[10] Randal E. Bryant,et al. Efficient implementation of a BDD package , 1991, DAC '90.
[11] Chikahiro Hori,et al. Interleaving based variable ordering methods for ordered binary decision diagrams , 1993, ICCAD.
[12] 藤田 昌宏,et al. Evaluation and Improvements of Boolean Comparison Method Based on Binary Decision Diagrams , 1988 .
[13] Randal E. Bryant,et al. Symbolic Boolean manipulation with ordered binary-decision diagrams , 1992, CSUR.
[14] Rolf Drechsler,et al. A genetic algorithm for variable ordering of obdds , 1996 .
[15] Christoph Meinel,et al. Binary Decision Diagrams and the Multiple Variable Order Problem , 1998, Universität Trier, Mathematik/Informatik, Forschungsbericht.
[16] Rolf Drechsler,et al. Functional simulation using binary decision diagrams , 1997, ICCAD 1997.
[17] Robert K. Brayton,et al. Dynamic variable reordering for BDD minimization , 1993, Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference.