The effects of compressive and tensile stresses from the etch stop layer on DC and AC characteristics and device reliabilities (HCI and NBTI) of IO n-/p-MOSFETs have been studied. Although tensile stress can increase the Idsat (/spl sim/8%) of nMOSFETs, the higher process temperature of thermal SiN deposition also results in worse Vt roll-off for nMOSFETs and poly depletion effects on pMOSFETs. In this experiment, thermal SiN films with tensile stress result in HCI and NBTI lifetime degradation. HCI lifetime reduction is about 3/spl times/ for nMOSFETs and 7/spl times/ for pMOSFETs. Tensile stress also enhances the channel length dependence effect of pMOSFET NBTI lifetime. Compared with PECVD SiN, thermal SiN results in about a 5/spl times/ lifetime reduction for short channel pMOSFETs.