Performance enhancement on sub-70 nm strained silicon SOI MOSFETs on ultra-thin thermally mixed strained silicon/SiGe on insulator (TM-SGOI) substrate with raised S/D
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D. Mocuta | S. Narasimha | A. Mocuta | B.H. Lee | E. Leobandung | M. Ieong | W. Haensch | P. Agnello | J. Welser | P. O'Neil | C. Lavoie | M. Sendelbach | R. Mo | D. Sadana | C. Cabral | M. Gribelyuk | J. Mezzapelle | K.A. Jenkins | S.H. Ku | K. Rim | K. Chan | A. Domenicucci | F. Jamin | I.Y. Yang | S. Bedell | H. Chen | A. Chakravarti | R.M. Mitchell | H. Kermel
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[2] Shinichi Takagi,et al. Dislocation-free formation of relaxed SiGe-on-insulator layers , 2002 .