Accurate and efficient impedance matching method in the presence of on-board and SMT parasitic components

An accurate and efficient impedance matching methodology for RF channels is presented in this paper. The methodology ensures a feasible impedance matching network and optimal RF channel performance by accounting for the parasitics of discrete SMT components as well as for those of the PCB. Such parasitics need to be included in the full channel simulation because they detune the impedance matching network and can affect the insertion and return loss dramatically. After the entire RF channel is accurately modeled and impedance matched, a bill of material (BOM) file is automatically generated to drive assembly of PCBs based on an integrated EM-schematic co-simulation. An RF channel test bench was built and measured showing good correlation between simulation and measurement, thus validating the proposed methodology.