Corrections to "Expandable Networks for Neuromorphic Chips"

In the above titled paper (ibid., vol. 54, no. 2, pp. 301-311, Feb 07), changes were made to Figures 6-8.

[1]  Bertram E. Shi,et al.  Expandable Networks for Neuromorphic Chips , 2007, IEEE Transactions on Circuits and Systems I: Regular Papers.

[2]  Leonid Belostotski,et al.  Noise figure optimization of inductively degenerated CMOS LNAs with integrated gate inductors , 2006, IEEE Transactions on Circuits and Systems I: Regular Papers.