Using Logic Programming for Fault Diagnosis in Digital Circuits

In this paper we show how a Prolog-like logic programming language can be efficiently used for fault diagnosis in digital circuits. We take the approach of diagnosis from first principles, i.e., reasoning from circuit description and behavior. With the single-fault assumption a program written in CHIP, an extended Prolog, locates the faulty gate from a hierarchical description of a circuit and faulty input/output patterns. The fault finding process is modeled in terms of constraint relaxation We show how the introduction of the demon concept in logic programming can improve the consistency checking mechanism and thus makes possible the diagnosis of big circuits. The program was successfully tested on circuits with more than 17000 gates.