Widely Adjustable Ring Oscillator Based ΣΔ ADC

Over-sampling scheme in addition to the noise shaping property of Δ∑ architectures, makes it very suitable for implementing high resolution data converters. In addition, this architecture exhibit low sensitivity to the non-ideality behavior of analog circuits, such as limited gain of amplifier, device mismatch, and offset of amplifier [1, 2]. This property is specially desirable in design of low-cost and high-performance mixed-signal circuits in modern CMOS technologies.