Use of VHDL to model and simulate analog-digital ICs

Demonstrates a method of modeling mixed analog and digital circuits by VHDL and simulating the circuits on a VHDL event driven simulator. Some major limitations of VHDL in analog or mixed analog-digital circuits can be modeled and simulated in VHDL through behavioral modeling to avoid the restrictions of VHDL. An oversampling sigma-delta analog-to-digital (A/D) converter is simulated using a VHDL simulator as an example of the method. The example demonstrates that analog or mixed analog-digital circuits can be modeled and simulated in VHDL through behavioral modeling to avoid the restrictions of VHDL.<<ETX>>