BDD minimization by truth table permutations
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[1] Masahiro Fujita,et al. On variable ordering of binary decision diagrams for the application of multi-level logic synthesis , 1991, Proceedings of the European Conference on Design Automation..
[2] Jochen Bern,et al. Efficient OBDD-Based Boolean Manipulation in CAD Beyond Current Limits , 1995, 32nd Design Automation Conference.
[3] 藤田 昌宏,et al. Evaluation and Improvements of Boolean Comparison Method Based on Binary Decision Diagrams , 1988 .
[4] Albert R. Wang,et al. Logic verification using binary decision diagrams in a logic synthesis environment , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.
[5] Masahiro Fujita,et al. Evaluation and improvement of Boolean comparison method based on binary decision diagrams , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.
[6] Nagisa Ishiura,et al. Shared binary decision diagram with attributed edges for efficient Boolean function manipulation , 1990, 27th ACM/IEEE Design Automation Conference.
[7] R. Rudell. Dynamic variable ordering for ordered binary decision diagrams , 1993, ICCAD 1993.