3.5 GHz operation of a superconducting packet switch element

The paper introduces a prototype model of a superconducting packet switch which is composed of an input buffer, a contention solver, and a distribution network. The input buffer and the contention solver enable contention-free distribution of data packets. The total design of the prototype has been completed and the total operation has been numerically simulated and confirmed. A 2/spl times/2 switching element which controls the paths of two packets is the key component of the prototype. The basic switching element with 1-b data-width is fabricated by a standard Nb trilayer process. Three-junction SQUIDs driven by a three-phase powering clock are used in the switch. The correct operation up to 3.5 GHz, limited by the measurement setup, is confirmed. The margin evaluation shows there remains enough margin at GHz operations.

[1]  Noriharu Miyaho,et al.  Atm in B-Isdn Communication Systems and Vlsi Realization , 1994, Proceedings of 1994 IEEE Symposium on VLSI Circuits.

[2]  Y. Nakasha,et al.  A 9.6 Gb/s HEMT ATM switch LSI for B-ISDN , 1992, GaAs IC Symposium Technical Digest 1992.

[3]  M. Hosoya,et al.  Superconducting packet switch , 1995, IEEE Transactions on Applied Superconductivity.

[4]  S. Yorozu,et al.  A superconductive ring-pipelined network system , 1995, IEEE Transactions on Applied Superconductivity.

[5]  D.R. Spears,et al.  Applications of public gigabit networks , 1992, IEEE Network.

[6]  Kouichi Genda,et al.  A 160-Gb/s ATM switching system using an internal speed-up crossbar switch , 1994, 1994 IEEE GLOBECOM. Communications: The Global Bridge.

[7]  B. Murdock,et al.  Superconductive crossbar system for communication applications , 1994 .

[8]  Fouad A. Tobagi,et al.  Fast packet switch architectures for broadband integrated services digital networks , 1990, Proc. IEEE.