A New Cost-Effective Technique for QoS Support in Clusters
暂无分享,去创建一个
José Duato | Francisco J. Quiles | José L. Sánchez | Francisco J. Alfaro | Alejandro Martínez | J. Duato | Alejandro Martínez | F. Quiles | F. J. Alfaro | J. L. Sánchez
[1] Li Fan,et al. Web caching and Zipf-like distributions: evidence and implications , 1999, IEEE INFOCOM '99. Conference on Computer Communications. Proceedings. Eighteenth Annual Joint Conference of the IEEE Computer and Communications Societies. The Future is Now (Cat. No.99CH36320).
[2] Cyriel Minkenberg,et al. Current issues in packet switch design , 2003, CCRV.
[3] William J. Dally,et al. A delay model and speculative architecture for pipelined routers , 2001, Proceedings HPCA Seventh International Symposium on High-Performance Computer Architecture.
[4] Nick McKeown,et al. ATM input-buffered switches with the guaranteed-rate property , 1998, Proceedings Third IEEE Symposium on Computers and Communications. ISCC'98. (Cat. No.98EX166).
[5] Derek Chiou,et al. The Network Processing Forum switch fabric benchmark specifications: an overview , 2005, IEEE Network.
[6] David Bull,et al. Insights into mobile multimedia communications , 1998 .
[7] William J. Dally,et al. Principles and Practices of Interconnection Networks , 2004 .
[8] G. Zipf,et al. The Psycho-Biology of Language , 1936 .
[9] Pedro López,et al. Performance Evaluation of Adaptive Routing Algorithms for k-ary-n-cubes , 1994, PCRCW.
[10] Hairong Sun,et al. Quality of service: delivering QoS on the internet and in corporate networks; P. Ferguson, G. Huston , 1999, Comput. Commun..
[11] Chita R. Das,et al. QoS provisioning in clusters: an investigation of Router and NIC design , 2001, ISCA 2001.
[12] Nick McKeown,et al. The iSLIP scheduling algorithm for input-queued switches , 1999, TNET.
[13] Raj Jain,et al. The art of computer systems performance analysis - techniques for experimental design, measurement, simulation, and modeling , 1991, Wiley professional computing.
[14] Nick McKeown,et al. Matching output queueing with a combined input output queued switch , 1999, IEEE INFOCOM '99. Conference on Computer Communications. Proceedings. Eighteenth Annual Joint Conference of the IEEE Computer and Communications Societies. The Future is Now (Cat. No.99CH36320).
[15] M. Robinson,et al. A low jitter, low power, CMOS 1.25-3.125Gbps transceiver , 2001, Proceedings of the 27th European Solid-State Circuits Conference.
[16] Sudhakar Yalamanchili,et al. MMR: a high-performance MultiMedia Router-architecture and design trade-offs , 1999, Proceedings Fifth International Symposium on High-Performance Computer Architecture.
[17] Li Shang,et al. Dynamic voltage scaling with links for power optimization of interconnection networks , 2003, The Ninth International Symposium on High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings..
[18] Morris Sloman,et al. A survey of quality of service in mobile computing environments , 1999, IEEE Communications Surveys & Tutorials.
[19] José Duato,et al. QoS in InfiniBand subnetworks , 2004, IEEE Transactions on Parallel and Distributed Systems.
[20] Xipeng Xiao,et al. Internet QoS: a big picture , 1999, IEEE Netw..
[21] Costas Courcoubetis,et al. Weighted Round-Robin Cell Multiplexing in a General-Purpose ATM Switch Chip , 1991, IEEE J. Sel. Areas Commun..
[22] David Harris,et al. CMOS VLSI Design: A Circuits and Systems Perspective , 2004 .
[23] Samuel P. Morgan,et al. Input Versus Output Queueing on a Space-Division Packet Switch , 1987, IEEE Trans. Commun..
[24] Marco Ajmone Marsan,et al. Packet-mode scheduling in input-queued cell-based switches , 2002, TNET.
[25] Thomas E. Anderson,et al. High-speed switch scheduling for local-area networks , 1993, TOCS.
[26] Chung-Hsun Huang,et al. Design of high-performance CMOS priority encoders and incrementer/decrementers using multilevel lookahead and multilevel folding techniques , 2002 .
[27] Chita R. Das,et al. MediaWorm: A QoS Capable Router Architecture for Clusters , 2002, IEEE Trans. Parallel Distributed Syst..
[28] Sharad Malik,et al. A power model for routers: modeling Alpha 21364 and InfiniBand routers , 2002, Proceedings 10th Symposium on High Performance Interconnects.
[29] Antonio Robles,et al. A Comparison of Router Architectures for Virtual Cut-Through and Wormhole Switching in a NOW Environment , 2001, J. Parallel Distributed Comput..
[30] José Duato,et al. Providing Full QoS Support in Clusters Using Only Two VCs at the Switches , 2005, HiPC.
[31] Lixia Zhang. VirtualClock: A New Traffic Control Algorithm for Packet-Switched Networks , 1991, ACM Trans. Comput. Syst..
[32] Hui Zhang,et al. Implementing distributed packet fair queueing in a scalable switch architecture , 1998, Proceedings. IEEE INFOCOM '98, the Conference on Computer Communications. Seventeenth Annual Joint Conference of the IEEE Computer and Communications Societies. Gateway to the 21st Century (Cat. No.98.
[33] Dimitrios Miras,et al. A Survey of Network QoS Needs of Advanced Internet Applications — Working Document — , 2002 .
[34] Manolis Katevenis,et al. Multiple priorities in a two-lane buffered crossbar , 2004, IEEE Global Telecommunications Conference, 2004. GLOBECOM '04..
[35] Sudhakar Yalamanchili,et al. Interconnection Networks: An Engineering Approach , 2002 .