Refresh control circuit for of repeatedly self-refreshing wordlines and semiconductor memory device having the same

A refresh control circuit driving repetitive refresh and a semiconductor memory device including the same are provided to reduce unnecessary current consumption by setting a refresh period more efficiently. In a refresh control circuit(100) of a semiconductor memory device having at least one memory bank including a number of memory cells arranged in a matrix of columns and rows, an address counter(110) generates a counting address consisting of numerous bits. A row decoder(130) selects a row of the memory bank corresponding to the counting address. The row decoder is driven to select the row of the memory bank regardless of at least one bit forming the counting address, according to the activation of a refresh redundancy signal. A redundancy address selector(150) generates a redundancy address. A redundancy address controller(170) generates the refresh redundancy signal enabled correspondingly to the generation of the counting address corresponding to the redundancy address.