A 600 V High-Voltage IC Technique With a New Self-Shielding Structure for High Noise Tolerance and Die Shrink

A novel 600 V high-voltage IC (HVIC) featuring a high noise tolerance is proposed. The purpose of the proposed HVIC is to achieve the high noise tolerance without an increase of the fabrication cost. The basic device concept is to arrange a P- separation layer around the high-side control part, which is called a new self-shielding structure, to reduce a hole current injection under the condition of negative transient voltage noise. By applying the new self-shielding structure in the HVIC, more than 3× higher noise tolerance (-95 V/1 μs) and 20% die shrink can be obtained compared with a conventional HVIC, without additional fabrication process. This means the noise tolerance of the fabricated HVIC with proposed structure is high enough to be applied to over 600 V/50-A class power conversion applications. In this paper, the new self-shielding concept of the proposed 600 V-class HVIC is presented with the simulation and experimental results.

[1]  G. Cantone,et al.  A novel 0.35µm 800V BCD technology platform for offline applications , 2012, 2012 24th International Symposium on Power Semiconductor Devices and ICs.

[2]  Xingbi Chen,et al.  A Novel Isolation Method for Half-Bridge Power ICs , 2013, IEEE Transactions on Electron Devices.

[3]  Chang-Jun Lee,et al.  Design and optimization of 700V HVIC technology with multi-ring isolation structure , 2013, 2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD).

[4]  Hitoshi,et al.  New Level-Shift LDMOS Structure for a 600 V-HVIC on Thick SOl , 2012 .

[5]  Gourab Majumdar,et al.  Structure of 600 V IC and a new voltage sensing device , 1993, [1993] Proceedings of the 5th International Symposium on Power Semiconductor Devices and ICs.

[6]  Liu Jizhi,et al.  A new level-shifting structure with multiply metal rings by divided RESURF technique ∗ , 2009 .

[7]  S.L. Kim,et al.  Realization of robust 600V high side gate drive IC with a new isolated self-shielding structure , 2005, Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005..

[8]  Wei Zhang,et al.  A High-Voltage LDMOS Compatible With High-Voltage Integrated Circuits on p-Type SOI Layer , 2009, IEEE Electron Device Letters.

[9]  R. Herzer,et al.  600V SOI gate drive HVIC for medium power applications operating up to 200/spl deg/C , 2005, Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005..

[10]  Tomoyuki Yamazaki,et al.  New high voltage integrated circuits using self-shielding technique , 1999, 11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312).

[11]  K. Shimizu,et al.  A novel high voltage Pch-MOS with a new drain drift structure for 1200V HVICs , 2013, 2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD).

[12]  Zhu Jing,et al.  A noise immunity improved level shift structure for a 600 V HVIC , 2013 .

[13]  Y. S. Choi,et al.  The new high voltage level up shifter for HVIC , 2002, 2002 IEEE 33rd Annual IEEE Power Electronics Specialists Conference. Proceedings (Cat. No.02CH37289).

[14]  J. Moritani,et al.  A high breakdown voltage IC with lateral power device based on SODI structure , 2004, 2004 Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs.

[16]  T. Terashima,et al.  The 2nd Generation divided RESURF structure for High Voltage ICs , 2008, 2008 20th International Symposium on Power Semiconductor Devices and IC's.

[17]  N. Nolhier,et al.  Self-shielded high voltage SOI structures for HVICs , 1996, 1996 International Semiconductor Conference. 19th Edition. CAS'96 Proceedings.

[18]  陈星弼,et al.  A new level-shifting structure with multiply metal rings by divided RESURF technique , 2009 .

[19]  K. Sakurai,et al.  Proposal of New Interconnection Technique for Very High-Voltage IC's , 1996 .

[20]  Weifeng Sun,et al.  A novel double-well isolation structure for high voltage ICs , 2012, 2012 24th International Symposium on Power Semiconductor Devices and ICs.

[21]  A. Parag,et al.  Junction isolation for high voltage integrated circuits , 2012, 2012 IEEE 27th Convention of Electrical and Electronics Engineers in Israel.

[22]  T. Terashima,et al.  Trench-Isolated High-Voltage IC with Reduced Parasitic Bipolar Transistor Action , 2007, Proceedings of the 19th International Symposium on Power Semiconductor Devices and IC's.

[23]  Bo Zhang,et al.  Realization of over 650V double RESURF LDMOS with HVI for high side gate drive IC , 2006, 2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings.

[24]  B. Zhang,et al.  Numerical and Experimental Investigation on a Novel High-Voltage ( $>$ 600-V) SOI LDMOS in a Self-Isolation HVIC , 2010, IEEE Transactions on Electron Devices.