Design of a novel reversible multiplier circuit using modified full adder

Multiplier circuits play an important role in reversible computation, which is helpful in diverse areas such as low power CMOS design, optical computing, DNA computing and bioinformatics, quantum computing and nanotechnology. In this paper a new reversible device called MFA (modified full adder) is used to design a novel reversible 4-bit binary multiplier circuit with low hardware complexity. It has been shown that the proposed reversible logic device in designing multiplier circuits can work singly as a reversible full adder. Furthermore, it has been demonstrated that the proposed design of reversible multiplier circuit needs fewer garbage outputs and constant inputs. The proposed multiplier can be generalized for N×N bit multiplication. Thus, this job will be of significant value as the technologies mature.

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