High Speed Electrical Characterization And Simulation Of A Pin Grid Array Package

1 . I n t r o d u c t i o n I n c r e a s e d s p e e d s a n d da ta r a t e s in d e v i c e s a r e r e q u i r i n g f a s t e r packages with be t te r high f r e q u e n c y r e s p o n s e . In o r d e r t o d e s i g n f a s t e r , more re l iab le p a c k a g i n g with minimum s i g n a l d i s t o r t i o n , it i s e s s e n t i a l t o s t u d y the s t r u c t u r e a n d t h e r e s p o n s e o f e x i s t i n g p a c k a g e s and b e ab le t o c o r r e l a t e the two. T h i s P G A evalua t ion w a s u n d e r t a k e n t o c o r r e la te s t r u c t u r a l e lements wi th in the p a c k a g e to d i f f e r e n t a s p e c t s o f i t s p e r f o r m a n c e . F r o m th is type o f d a t a , m o d e l s were d e r i v e d and s imu l a t i o n s p e r f o r m e d t h a t n o t o n l y p r e d i c t e d the p e r f o r m a n c e t r e n d s i n th i s p a c k a g e , but s i m i la r ly a l l o w s o n e to p r e d i c t t h e p e r f o r m a n c e of p a c k a g e s i n c o r p o r a t i n g ( o r e l i m i n a t i n g ) s imi la r e lements . T h e s e d a t a a r e b e i n g used in the d e s i g n o f f u t u r e genera t ion high s p e e d , high f r e q u e n c y mul t i layer packages . T h e P G A that w a s measured a n d c h a r a c te r ized w a s a 1 8 1 pin mul t i layer h i g h tempe r a t u r e c o f i r e d c e r a m i c p a c k a g e t h a t i s c u r r e n t l y be ing u s e d t o p a c k a g e h i g h s p e e d s i l icon ECL g a t e a r r a y s . I t i s a s t a n d a r d high tempe r a t u r e c o f i r e d c e r a m i c mul t i layer package that h a s metal l a y e r s f o r b r a z i n g o f the p i n s , s i g n a l l i n e s , s i x g r o u n d / p o w e r p l a n e s , and l a y e r s f o r a t tachment o f d e c o u p l i n g c a p a c i t o r s a n d a h e a t s i n k . As i t u s e s s tandard high t empe r a t u r e c o f i r e d t u n g s t e n meta l l iza t ion , i t m u s t b e g o l d p la ted a f t e r m a n u f a c t u r e t o f a c i l i t a t e w i r e b o n d i n g . In o r d e r t o d o t h i s , an a d d i t i o n a l l ayer o f l i n e s be low t h e s i g n a l l i n e l a y e r ( F i g u r e 1 ) i s inc luded which a l l o w s e lec t rop l a t i n g . T h e s e l ines a r e s u b s e q u e n t l y d i s c o n n e c t e d , b u t a c t a s o p e n s t u b s that a f f e c t the high s p e e d , high f r e q u e n c y p e r f o r m a n c e of the p a c k a g e . Figure 1: Schematic cross-section of the PGA (not to scale) showing the interconnection of the signal line and the plating line through the via. 2 . E x p e r i m e n t a l 2-1 . Test E n v i r o n m e n t T h e P G A w a s mounted o n a t e s t board tha t a l l o w e d us t o c o n t a c t the measurement p r o b e s d i rec t ly o n t o a n ac tua l pr in ted c i r c u i t board (PCB). T h i s tes t board was used i n c o n j u n c t i o n with h igh f r e q u e n c y w a f e r a n d p a c k a g e p r o b e h e a d s , a n d a s p e c i a l t e s t c h i p tha t a l lowed p r o b i n g i n s i d e the package [ l ] . F o r a l l e l e c t r i c a l m e a s u r e m e n t s , t h e P G A was m o u n t e d on t h e t e s t b o a r d , a n d the p ins f o r the g r o u n d p l a n e d i r e c t l y be low t h e s i g n a l layer were s h o r t e d t o the P C B g r o u n d . C har a c te r i z at i o n s P e r f o r m e d 2 2 . As i s c o m m o n l y d o n e with h i g h s p e e d p a c k a g e s [ i 3 1 , th i s P G A w a s charac te r ized u s i n g t ime and f r e q u e n c y domain techniques . T ime d o m a i n m e a s u r e m e n t s w e r e d o n e o n an H P 5 4 1 2 0 A d i g i t i z i n g o s c i l l o s c o p e . A 200mV s t e p i n p u t w i t h a 125 p s r i s e t i m e w a s a p p l i e d t o t h e package pin a t t h e tes t b o a r d f o r a l l m e a s u r e m e n t s . F o r re f lec tomet ry m e a s u r e m e n t s , t h e e n d of the s i g n a l l i n e w a s u n t e r m i n a t e d ; f o r t r a n s m i s s i o n m e a s u r e m e n t s , t h e s i g n a l was s e n s e d o n the w i r e b o n d e d t e s t ch ip in t h e packa e cavi ty . T h e p r o b e heads used e n s u r e d 5 0 8 t e rmina t ion at t h e s i g n a l input a n d o u t p u t . Cro s s t a l k meas uremen ts w e r e p e r f o r m e d b u t wi l l not b e i n c l u d e d h e r e . F r e q u e n c domain measurements were m a d e using a &Pf!s lOA Network Analyzer and a 10 G H z b a n d w i d t h . As i n the t ime domain t r a n s m i s s i o n m e a s u r e m e n t s , the s i g n a l w a s i n p u t a t the t i p o f a s i g n a l p in a t t h e tes t board a n d s e n s e d o n t h e w i r e b o n d e d t e s t ch ip in t h e p a c k a g e cavi ty . 303 lS3 Japan lntl Electronics Manufaduring Technology Symposium 2-3 . S i g n a l L i n e s f o r C h a r a c t e r i z a t i o n T h e l i n e s l i s ted in Table 1 a n d s h o w n in F i g u r e 2 w e r e c h o s e n to g ive a r e p r e s e n t a t i v e s a m l e o f the p e r f o r m a n c e of t h e p a c k a g e on t h e g a s i s o f n o t o n l y t h e i r s i g n a l l ine l e n g t h s , b u t t h e l e n g t h o f t h e i r p l a t i n g l ines a s w e l l . In Line Line length signaVgrd separation ( d u d Long 15.9 0.7 9.2 10.5 Midl 13.3 4.2 5.7 7.6 Mid2 12.9 0.7 8.0 12.7 Short 7.6 6.8 2.5 11.4 (signal) (plating) (Sect. I) (Sect. 11) Table 1: Line lengths and signal pin nearest ground pin distance, dvo. for Sections I and (11). Units are mm.