论文信息 - EMB - Based Design of Mealy FSM

EMB - Based Design of Mealy FSM

Abstract A method is proposed allowing implementing Mealy FSM logic circuits with embedded memory blocks of FPGA chips. The method is based on transformation of FSM structure table and replacement of some logical conditions. Example of design and results of investigations are given.

Alexander Barkalov | Larysa Titarenko | Malgorzata Kolopienczyk

[1] Anurag Tiwari,et al. Saving power by mapping finite-state machines into embedded memory blocks in FPGAs , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

[2] A. A. Barkalov. Multilevel programmable logic array schemes for microprogrammed automata , 1994 .

[3] Valery Sklyarov. Hierarchical finite-state machines and their use for digital control , 1999, IEEE Trans. Very Large Scale Integr. Syst..

[4] Gustavo Sutter,et al. Low-Power FSMs in FPGA: Encoding Alternatives , 2002, PATMOS.

[5] Jason Cong,et al. Synthesis for FPGAs with embedded memory blocks , 2000, FPGA '00.

[6] Mariusz Rawski,et al. 5 Logic Synthesis Method of Digital Circuits Designed for Implementation with Embedded Memory Blocks of FPGAs , 2011 .

[7] Hana Kubatova. Finite State Machine Implementation in FPGAs , 2005 .

[8] A. Civit-Balcells,et al. ROM-Based Finite State Machine Implementation in Low Cost FPGAs , 2007, 2007 IEEE International Symposium on Industrial Electronics.

[9] Mariusz Rawski,et al. An application of functional decomposition in ROM-based FSM implementation in FPGA devices , 2005, J. Syst. Archit..

[10] Valery Sklyarov. Synthesis and Implementation of RAM-Based Finite State Machines in FPGAs , 2000, FPL.

[11] Massoud Pedram,et al. Multi-code state assignment for low power design , 2000 .